From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from 004.mia.mailroute.net (004.mia.mailroute.net [199.89.3.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1C547EEBB; Thu, 17 Jul 2025 20:59:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=199.89.3.7 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752785977; cv=none; b=Fk7NjOAUNlmqGUetyN+67EdUy68gEbQFCjvJcXwHMGzk6sUcgMtxXIGxHoVDcnQvYC/PceQojzzY+dN6lsOW2vcpxD8iImxGL8OBKVQ5J0cHdKLJLdShHSLz+NZG3gJ2bFiwZ+9iZOKu5hNNJ3KKrhMS74FoU+JwXBZNbijTkzg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752785977; c=relaxed/simple; bh=a1GeMU9pzp+aaRRqmQ4iYCYUO8rIrY1Vk9cTwmk2dyc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=l+ec6eCZQ0YFPnuZp/E0FFmuqsM6eeW5UkkCOe1T3eeMpjTeEdFbWF3JAcmyEuc5KoiTuyjtJg9ODlgFeZKcS3wwUYXQUraxuLPxAX4XMdTSWamWwPqtwaR9UBaNjMGPVy6BfTDAGu59oyk5NCURcX8l2nFBz0g9oYFj0J5WTFQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=acm.org; spf=pass smtp.mailfrom=acm.org; dkim=pass (2048-bit key) header.d=acm.org header.i=@acm.org header.b=IB+2Bf2T; arc=none smtp.client-ip=199.89.3.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=acm.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=acm.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=acm.org header.i=@acm.org header.b="IB+2Bf2T" Received: from localhost (localhost [127.0.0.1]) by 004.mia.mailroute.net (Postfix) with ESMTP id 4bjlfb3DFwzm0ytb; Thu, 17 Jul 2025 20:59:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=acm.org; h= content-transfer-encoding:mime-version:references:in-reply-to :x-mailer:message-id:date:date:subject:subject:from:from :received:received; s=mr01; t=1752785973; x=1755377974; bh=b7/py 0P028lMbB4c+XUc8d82X2s5g2pHrclhUkoNqqw=; b=IB+2Bf2TmMpBzu5q02yiM gwHKR9nSmLfKm51YEuYtgfcCsNtc2/ttLQKUTUmfdzDsTmdvYN/Uut2WW+g6aHHE GXvnwHX/VH5q0T2unnDOHqMnokHrxJNKTLxi6biPaZ6xU81FUeJSzbDQqsvmpCit It+vFbZdgwb7zObWVJSAmqIrwZrPhRLvgq9VjGdAG2O5GcnfoCGvsjLhYXKbqvLu FaNXj1mv1YH6ZA24qaPtQ9lKiQf/JoHGqmqR62uK0NCtv9pOP9lSSURo0/D8wfn/ hII4CwTIck5psg9DLC98Gg/vbuGwDZzj+uirSaO2AN3cKV5G28zbpS0sYwWzP0Ju A== X-Virus-Scanned: by MailRoute Received: from 004.mia.mailroute.net ([127.0.0.1]) by localhost (004.mia [127.0.0.1]) (mroute_mailscanner, port 10029) with LMTP id E4tkanHICIdm; Thu, 17 Jul 2025 20:59:33 +0000 (UTC) Received: from bvanassche.mtv.corp.google.com (unknown [104.135.204.82]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: bvanassche@acm.org) by 004.mia.mailroute.net (Postfix) with ESMTPSA id 4bjlfQ3mbTzm0yst; Thu, 17 Jul 2025 20:59:25 +0000 (UTC) From: Bart Van Assche To: Jens Axboe Cc: linux-block@vger.kernel.org, linux-scsi@vger.kernel.org, Christoph Hellwig , Damien Le Moal , Bart Van Assche , Avri Altman , "Bao D. Nguyen" , Can Guo , "Martin K. Petersen" Subject: [PATCH v21 12/12] ufs: core: Inform the block layer about write ordering Date: Thu, 17 Jul 2025 13:58:08 -0700 Message-ID: <20250717205808.3292926-13-bvanassche@acm.org> X-Mailer: git-send-email 2.50.0.727.gbf7dc18ff4-goog In-Reply-To: <20250717205808.3292926-1-bvanassche@acm.org> References: <20250717205808.3292926-1-bvanassche@acm.org> Precedence: bulk X-Mailing-List: linux-block@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable >From the UFSHCI 4.0 specification, about the MCQ mode: "Command Submission 1. Host SW writes an Entry to SQ 2. Host SW updates SQ doorbell tail pointer Command Processing 3. After fetching the Entry, Host Controller updates SQ doorbell head pointer 4. Host controller sends COMMAND UPIU to UFS device" In other words, in MCQ mode, UFS controllers are required to forward commands to the UFS device in the order these commands have been received from the host. This patch improves performance as follows on a test setup with UFSHCI 4.0 controller: - When not using an I/O scheduler: 2.3x more IOPS for small writes. - With the mq-deadline scheduler: 2.0x more IOPS for small writes. Reviewed-by: Avri Altman Cc: Bao D. Nguyen Cc: Can Guo Cc: Martin K. Petersen Signed-off-by: Bart Van Assche --- drivers/ufs/core/ufshcd.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index 50adfb8b335b..6ff097e2c919 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -5281,6 +5281,13 @@ static int ufshcd_sdev_configure(struct scsi_devic= e *sdev, struct ufs_hba *hba =3D shost_priv(sdev->host); struct request_queue *q =3D sdev->request_queue; =20 + /* + * The write order is preserved per MCQ. Without MCQ, auto-hibernation + * may cause write reordering that results in unaligned write errors. + */ + if (hba->mcq_enabled) + lim->features |=3D BLK_FEAT_ORDERED_HWQ; + lim->dma_pad_mask =3D PRDT_DATA_BYTE_COUNT_PAD - 1; =20 /*