From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-00082601.pphosted.com (mx0a-00082601.pphosted.com [67.231.145.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6109E286422 for ; Fri, 8 Aug 2025 15:58:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.145.42 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754668720; cv=none; b=HABFOvwrAy4HwttsqMqINPZqqSH8326EQFgOqOoXCzWQmqZbszIWr43Mvj7P4wpt/FhMzDR1GDWFXFdpuoMrqywt5qellPPG8uYTG8cIzLc/f6MFynauAg+Vmzhav3acF4zsdZmD0uD5DubDAfWCq0m/R9Z+onr1IEpO3XdNu+A= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754668720; c=relaxed/simple; bh=OpiR32twtMPhsofFJXQvEMIidmg65TOOfZwEnwMGpWQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=DrfNZKtv+ttCGYFo9pAPf2xYXgC66FZ7Jf9XtylYizgI4lGegBF7mUge4mHY5ed0ozil00oSKXE60Q0v05tdXzBWh88Rcg9XdUxBtkuPPz/9cck78/IXBCxOVRbAUewHvIHZgCxU06fWHgXlg+32snJkHcKYSM3vbiTC3MqTjgE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=meta.com; spf=pass smtp.mailfrom=meta.com; dkim=pass (2048-bit key) header.d=meta.com header.i=@meta.com header.b=cUas7Cf5; arc=none smtp.client-ip=67.231.145.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=meta.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=meta.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=meta.com header.i=@meta.com header.b="cUas7Cf5" Received: from pps.filterd (m0109333.ppops.net [127.0.0.1]) by mx0a-00082601.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 578FKBbD021638 for ; Fri, 8 Aug 2025 08:58:37 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=meta.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=s2048-2025-q2; bh=uwio7rxa8oKlvcqcfyOh9gFSWxMddgRaUqqXPiRAGvk=; b=cUas7Cf5anoq xri22NB0H1qVElY+uhV4QmbcSknEyHd5/GaoXFNOlJbSykdQ/3n0v0wK0AfPRqAM xzq2JlYOdfCkHu5iqEnD5WA5szy3zBhjbqyDfvNNnvGL641iBeoEcw1ogyxgq90k MNoZuzxQ9q+YU422/5mSqJiGkPflUZSPMIWkrXf5o0ebSqylbXxKlre1PeMTh+pc nu5aakxbLueZpsKifkXdGqwVvtI1DoYoXeqenp1xQ8vccIGkof9zqhjSFCeTO3em oeavDEeZPHI9q2ZYTjSPY55kL/HzFBNmK5rCOyv4buOc21FxrGfM8/j+sLtxL7H2 GikCVOWs+A== Received: from maileast.thefacebook.com ([163.114.135.16]) by mx0a-00082601.pphosted.com (PPS) with ESMTPS id 48dbwck3f3-8 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Fri, 08 Aug 2025 08:58:37 -0700 (PDT) Received: from twshared10560.01.ash9.facebook.com (2620:10d:c0a8:1b::2d) by mail.thefacebook.com (2620:10d:c0a9:6f::237c) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.17; Fri, 8 Aug 2025 15:58:31 +0000 Received: by devbig197.nha3.facebook.com (Postfix, from userid 544533) id 539EF6C76D0; Fri, 8 Aug 2025 08:58:28 -0700 (PDT) From: Keith Busch To: , CC: , , , Keith Busch Subject: [PATCHv5 8/8] nvme-pci: convert metadata mapping to dma iter Date: Fri, 8 Aug 2025 08:58:26 -0700 Message-ID: <20250808155826.1864803-9-kbusch@meta.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20250808155826.1864803-1-kbusch@meta.com> References: <20250808155826.1864803-1-kbusch@meta.com> Precedence: bulk X-Mailing-List: linux-block@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-FB-Internal: Safe Content-Type: text/plain X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODA4MDEyOSBTYWx0ZWRfXxJ3cAbHrlFsV pDpeMT4b7+QLpHiNzoLhRSk6ytPgyoAAOFXHgHaF9WurIYhWJdB0/VLmdoVcIJAxg9c/bZTXd7t RrxvX3jLEx0Rl8ebG4/FgcRe0sK3I+NgTmwZkvzgiQPOYG07Bl7H0HdEdEJKw9MKZwKrm3Wrpcy P8vO0RCZsQKKusASAnPH3RzAvWzaVTZR+MFet8Z1/W8eS++5k8UxO9buZg3Zi+jPi+M6CF25s3S c49xswhsc4h4HRsFMc4M++7/Y7Z36WP4LAjDZMOwg7kGc3WVht6n1G8jsM+P4Q5xmRW1HM6ekY1 BODNmDglc1eppdpDFYveBnwb7PbNDrT2ygG5GnkfEAUJgVqdhmU0saTxdDEb2FByELyVfxR0icE e5+rdPMbUxwv0VYrmBW7fmDm1T7fSL3s8xQpCIFjF8jLNl7oIa26jedKjuxFdHBUldaK4SoN X-Proofpoint-GUID: 9TxQQLAq7o0OhphGhU0ROyhq1lRz2b9G X-Authority-Analysis: v=2.4 cv=DthW+H/+ c=1 sm=1 tr=0 ts=68961ead cx=c_pps a=MfjaFnPeirRr97d5FC5oHw==:117 a=MfjaFnPeirRr97d5FC5oHw==:17 a=2OwXVqhp2XgA:10 a=VwQbUJbxAAAA:8 a=BRFPTy0GvKBLt4V1GPoA:9 X-Proofpoint-ORIG-GUID: 9TxQQLAq7o0OhphGhU0ROyhq1lRz2b9G X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-08_05,2025-08-06_01,2025-03-28_01 From: Keith Busch Aligns data and metadata to the similar dma mapping scheme and removes one more user of the scatter-gather dma mapping. Signed-off-by: Keith Busch --- drivers/nvme/host/pci.c | 159 +++++++++++++++++++++------------------- 1 file changed, 82 insertions(+), 77 deletions(-) diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c index decb3ad1508a7..ab9d37d0e05dd 100644 --- a/drivers/nvme/host/pci.c +++ b/drivers/nvme/host/pci.c @@ -172,9 +172,7 @@ struct nvme_dev { u32 last_ps; bool hmb; struct sg_table *hmb_sgt; - mempool_t *dmavec_mempool; - mempool_t *iod_meta_mempool; =20 /* shadow doorbell buffer support: */ __le32 *dbbuf_dbs; @@ -264,6 +262,12 @@ enum nvme_iod_flags { =20 /* DMA mapped with PCI_P2PDMA_MAP_BUS_ADDR */ IOD_P2P_BUS_ADDR =3D 1U << 3, + + /* Metadata DMA mapped with PCI_P2PDMA_MAP_BUS_ADDR */ + IOD_META_P2P_BUS_ADDR =3D 1U << 4, + + /* Metadata using non-coalesced MPTR */ + IOD_META_MPTR =3D 1U << 5, }; =20 struct nvme_dma_vec { @@ -281,13 +285,14 @@ struct nvme_iod { u8 nr_descriptors; =20 unsigned int total_len; + unsigned int meta_total_len; struct dma_iova_state dma_state; + struct dma_iova_state meta_dma_state; void *descriptors[NVME_MAX_NR_DESCRIPTORS]; struct nvme_dma_vec *dma_vecs; unsigned int nr_dma_vecs; =20 dma_addr_t meta_dma; - struct sg_table meta_sgt; struct nvme_sgl_desc *meta_descriptor; }; =20 @@ -644,6 +649,11 @@ static inline struct dma_pool *nvme_dma_pool(struct = nvme_queue *nvmeq, return nvmeq->descriptor_pools.large; } =20 +static inline bool nvme_pci_cmd_use_meta_sgl(struct nvme_command *cmd) +{ + return (cmd->common.flags & NVME_CMD_SGL_ALL) =3D=3D NVME_CMD_SGL_METAS= EG; +} + static inline bool nvme_pci_cmd_use_sgl(struct nvme_command *cmd) { return cmd->common.flags & @@ -711,6 +721,43 @@ static void __nvme_free_sgls(struct device *dma_dev,= struct nvme_sgl_desc *sge, le32_to_cpu(sg_list[i].length), dir); } =20 +static void nvme_free_meta_sgls(struct nvme_iod *iod, struct device *dma= _dev, + enum dma_data_direction dir) +{ + struct nvme_sgl_desc *sge =3D iod->meta_descriptor; + + __nvme_free_sgls(dma_dev, sge, &sge[1], dir); +} + +static void nvme_unmap_metadata(struct request *req) +{ + struct nvme_queue *nvmeq =3D req->mq_hctx->driver_data; + enum dma_data_direction dir =3D rq_dma_dir(req); + struct nvme_iod *iod =3D blk_mq_rq_to_pdu(req); + struct device *dma_dev =3D nvmeq->dev->dev; + + if (iod->flags & IOD_META_MPTR) { + dma_unmap_page(dma_dev, iod->meta_dma, + rq_integrity_vec(req).bv_len, + rq_dma_dir(req)); + return; + } + + if (!blk_rq_dma_unmap(req, dma_dev, &iod->meta_dma_state, + iod->meta_total_len, + iod->flags & IOD_META_P2P_BUS_ADDR)) { + if (nvme_pci_cmd_use_meta_sgl(&iod->cmd)) + nvme_free_meta_sgls(iod, dma_dev, dir); + else + dma_unmap_page(dma_dev, iod->meta_dma, + iod->meta_total_len, dir); + } + + if (iod->meta_descriptor) + dma_pool_free(nvmeq->descriptor_pools.small, + iod->meta_descriptor, iod->meta_dma); +} + static void nvme_free_sgls(struct request *req) { struct nvme_iod *iod =3D blk_mq_rq_to_pdu(req); @@ -1023,70 +1070,59 @@ static blk_status_t nvme_map_data(struct request = *req) return nvme_pci_setup_data_prp(req, &iter); } =20 -static void nvme_pci_sgl_set_data_sg(struct nvme_sgl_desc *sge, - struct scatterlist *sg) -{ - sge->addr =3D cpu_to_le64(sg_dma_address(sg)); - sge->length =3D cpu_to_le32(sg_dma_len(sg)); - sge->type =3D NVME_SGL_FMT_DATA_DESC << 4; -} - static blk_status_t nvme_pci_setup_meta_sgls(struct request *req) { struct nvme_queue *nvmeq =3D req->mq_hctx->driver_data; - struct nvme_dev *dev =3D nvmeq->dev; + unsigned int entries =3D req->nr_integrity_segments; struct nvme_iod *iod =3D blk_mq_rq_to_pdu(req); + struct nvme_dev *dev =3D nvmeq->dev; struct nvme_sgl_desc *sg_list; - struct scatterlist *sgl, *sg; - unsigned int entries; + struct blk_dma_iter iter; dma_addr_t sgl_dma; - int rc, i; - - iod->meta_sgt.sgl =3D mempool_alloc(dev->iod_meta_mempool, GFP_ATOMIC); - if (!iod->meta_sgt.sgl) - return BLK_STS_RESOURCE; + int i =3D 0; =20 - sg_init_table(iod->meta_sgt.sgl, req->nr_integrity_segments); - iod->meta_sgt.orig_nents =3D blk_rq_map_integrity_sg(req, - iod->meta_sgt.sgl); - if (!iod->meta_sgt.orig_nents) - goto out_free_sg; + if (!blk_rq_integrity_dma_map_iter_start(req, dev->dev, + &iod->meta_dma_state, &iter)) + return iter.status; =20 - rc =3D dma_map_sgtable(dev->dev, &iod->meta_sgt, rq_dma_dir(req), - DMA_ATTR_NO_WARN); - if (rc) - goto out_free_sg; + if (iter.p2pdma.map =3D=3D PCI_P2PDMA_MAP_BUS_ADDR) + iod->flags |=3D IOD_META_P2P_BUS_ADDR; + else if (blk_rq_dma_map_coalesce(&iod->meta_dma_state)) + entries =3D 1; + + if (entries =3D=3D 1 && !(nvme_req(req)->flags & NVME_REQ_USERCMD)) { + iod->cmd.common.metadata =3D cpu_to_le64(iter.addr); + iod->meta_total_len =3D iter.len; + iod->meta_dma =3D iter.addr; + iod->meta_descriptor =3D NULL; + return BLK_STS_OK; + } =20 sg_list =3D dma_pool_alloc(nvmeq->descriptor_pools.small, GFP_ATOMIC, &sgl_dma); if (!sg_list) - goto out_unmap_sg; + return BLK_STS_RESOURCE; =20 - entries =3D iod->meta_sgt.nents; iod->meta_descriptor =3D sg_list; iod->meta_dma =3D sgl_dma; - iod->cmd.common.flags =3D NVME_CMD_SGL_METASEG; iod->cmd.common.metadata =3D cpu_to_le64(sgl_dma); - - sgl =3D iod->meta_sgt.sgl; if (entries =3D=3D 1) { - nvme_pci_sgl_set_data_sg(sg_list, sgl); + iod->meta_total_len =3D iter.len; + nvme_pci_sgl_set_data(sg_list, &iter); return BLK_STS_OK; } =20 sgl_dma +=3D sizeof(*sg_list); - nvme_pci_sgl_set_seg(sg_list, sgl_dma, entries); - for_each_sg(sgl, sg, entries, i) - nvme_pci_sgl_set_data_sg(&sg_list[i + 1], sg); - - return BLK_STS_OK; + do { + nvme_pci_sgl_set_data(&sg_list[++i], &iter); + iod->meta_total_len +=3D iter.len; + } while (blk_rq_integrity_dma_map_iter_next(req, dev->dev, &iter)); =20 -out_unmap_sg: - dma_unmap_sgtable(dev->dev, &iod->meta_sgt, rq_dma_dir(req), 0); -out_free_sg: - mempool_free(iod->meta_sgt.sgl, dev->iod_meta_mempool); - return BLK_STS_RESOURCE; + nvme_pci_sgl_set_seg(sg_list, sgl_dma, i); + if (unlikely(iter.status)) + nvme_unmap_metadata(req); + return iter.status; } =20 static blk_status_t nvme_pci_setup_meta_mptr(struct request *req) @@ -1099,6 +1135,7 @@ static blk_status_t nvme_pci_setup_meta_mptr(struct= request *req) if (dma_mapping_error(nvmeq->dev->dev, iod->meta_dma)) return BLK_STS_IOERR; iod->cmd.common.metadata =3D cpu_to_le64(iod->meta_dma); + iod->flags |=3D IOD_META_MPTR; return BLK_STS_OK; } =20 @@ -1120,7 +1157,7 @@ static blk_status_t nvme_prep_rq(struct request *re= q) iod->flags =3D 0; iod->nr_descriptors =3D 0; iod->total_len =3D 0; - iod->meta_sgt.nents =3D 0; + iod->meta_total_len =3D 0; =20 ret =3D nvme_setup_cmd(req->q->queuedata, req); if (ret) @@ -1231,25 +1268,6 @@ static void nvme_queue_rqs(struct rq_list *rqlist) *rqlist =3D requeue_list; } =20 -static __always_inline void nvme_unmap_metadata(struct request *req) -{ - struct nvme_iod *iod =3D blk_mq_rq_to_pdu(req); - struct nvme_queue *nvmeq =3D req->mq_hctx->driver_data; - struct nvme_dev *dev =3D nvmeq->dev; - - if (!iod->meta_sgt.nents) { - dma_unmap_page(dev->dev, iod->meta_dma, - rq_integrity_vec(req).bv_len, - rq_dma_dir(req)); - return; - } - - dma_pool_free(nvmeq->descriptor_pools.small, iod->meta_descriptor, - iod->meta_dma); - dma_unmap_sgtable(dev->dev, &iod->meta_sgt, rq_dma_dir(req), 0); - mempool_free(iod->meta_sgt.sgl, dev->iod_meta_mempool); -} - static __always_inline void nvme_pci_unmap_rq(struct request *req) { if (blk_integrity_rq(req)) @@ -3055,7 +3073,6 @@ static int nvme_disable_prepare_reset(struct nvme_d= ev *dev, bool shutdown) =20 static int nvme_pci_alloc_iod_mempool(struct nvme_dev *dev) { - size_t meta_size =3D sizeof(struct scatterlist) * (NVME_MAX_META_SEGS += 1); size_t alloc_size =3D sizeof(struct nvme_dma_vec) * NVME_MAX_SEGS; =20 dev->dmavec_mempool =3D mempool_create_node(1, @@ -3064,17 +3081,7 @@ static int nvme_pci_alloc_iod_mempool(struct nvme_= dev *dev) dev_to_node(dev->dev)); if (!dev->dmavec_mempool) return -ENOMEM; - - dev->iod_meta_mempool =3D mempool_create_node(1, - mempool_kmalloc, mempool_kfree, - (void *)meta_size, GFP_KERNEL, - dev_to_node(dev->dev)); - if (!dev->iod_meta_mempool) - goto free; return 0; -free: - mempool_destroy(dev->dmavec_mempool); - return -ENOMEM; } =20 static void nvme_free_tagset(struct nvme_dev *dev) @@ -3524,7 +3531,6 @@ static int nvme_probe(struct pci_dev *pdev, const s= truct pci_device_id *id) nvme_free_queues(dev, 0); out_release_iod_mempool: mempool_destroy(dev->dmavec_mempool); - mempool_destroy(dev->iod_meta_mempool); out_dev_unmap: nvme_dev_unmap(dev); out_uninit_ctrl: @@ -3588,7 +3594,6 @@ static void nvme_remove(struct pci_dev *pdev) nvme_dbbuf_dma_free(dev); nvme_free_queues(dev, 0); mempool_destroy(dev->dmavec_mempool); - mempool_destroy(dev->iod_meta_mempool); nvme_release_descriptor_pools(dev); nvme_dev_unmap(dev); nvme_uninit_ctrl(&dev->ctrl); --=20 2.47.3