Re: Reg: New MFD Driver for my PCIe Device

[Greg KH <gregkh@linuxfoundation.org>]

On Tue, Nov 16, 2021 at 11:34:24AM +0000, Kumaravel.Thiagarajan@microchip.com wrote:
> Dear Greg K-H & Lee Jones,
> 
> Thanks for your inputs and I need more of your help to understand things better.
> 
> I took this MFD route not just based on the recommendation from Linus Walleij but also based on the kernel documentation @ /Documentation/driver-api/driver-model/platform.rst which states as below.
> 
> "Rarely, a platform_device will be connected through a segment of some other kind of bus; but its registers will still be directly addressable."
> 
> I visualized these two (GPIO controller & OTP/EEPROM controller) devices as platform devices present on the same PCI function and these two devices are not detectable unless the base PCI function driver enumerates them and anyway their registers are directly addressable.
> Hence, I thought that the platform driver architecture is inclusive of devices like this.

Sorry, but no.  Again, platform devices are ONLY for actual platform
devices, not "things on a device that happens to be on another bus
device".  Like PCI devices.

That is what the auxiliary bus code was written for, please read
Documentation/driver-api/auxiliary_bus.rst for how to use it.

> Please let me know your comments.
> 
> Also please let me know if I can talk to any of you over a webex call to get clarifications on my further doubts.

Email works best, video chats for every patch review does not scale at
all :)

thanks,

greg k-h