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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Info: AW1haW4tMjYwNzI0MDA3MiBTYWx0ZWRfX0aT3MhYmrM63 lvuNU/BXhRlSsm8dwyjLYqAi1a3aT51FEEhWYHEOcEuqUJ62/aucm7te6YwCNgF7GlMPu5Yuxuz EQJ+Js28B82ILALR6hde5o9wXzjfmck= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzI0MDA3MiBTYWx0ZWRfX7QcOdNFkFReu +QQRR+VZO/enkW1l+mAtFDDp1AZBoRwqD5Ihfgy+k39O+xIPt11TToALfVXdQcK+QmLslYIOFzY dxMaJ3Z4FecQWaSNashfOfRKL0WuCu9FpPQiVmcXuThROSNQglJHkIh09XyNEyB12Te9fenZEON E1iZirlcEBWpiFrmqKV942yhMzwYnvXnUv+RW/ZVKQKAP9PPuzNF4Z2nqZBuMe3kbwC0FAAkNcn k3K0KcvLbUL8MFiYBmRlGtxvoxVnNnQP5hxFC5Ge6VEhHeMOSTLcn6vWxfZAC5EYv2+5DSdX9kT gczUoEWlKNs48X7Eh8waXT4rkrmka+BG5ri9sCwtdx1fiGJvnTKmTEvCsRXd10BsratZydDMkFu X1o2CMGs6XIzUAj49jXY6oXtfETk3gESxHtyGhQC11iiXq24fNmjC+K0hiIPi7JBW7MAyT2v4zg f8HOE2Ev3c+40wSLcxQ== X-Authority-Analysis: v=2.4 cv=Z9Dc2nRA c=1 sm=1 tr=0 ts=6a631c0c cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=vWUw25gFCHY1kBUJboQA:9 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-GUID: yJlmcMwJN_osJd6MJaSNGhLt8bSQ2g7B X-Proofpoint-ORIG-GUID: yJlmcMwJN_osJd6MJaSNGhLt8bSQ2g7B X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-24_01,2026-07-22_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 phishscore=0 impostorscore=0 lowpriorityscore=0 adultscore=0 priorityscore=1501 suspectscore=0 bulkscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607240072 On 24-07-2026 01:01, Krzysztof Kozlowski wrote: > On 23/07/2026 14:31, Rahul Samana wrote: >> Add the PCI class compatible to pcie0_port so child nodes below the PCI >> bridge can be matched against the enumerated PCI topology. >> >> This is needed by the M.2 E-key graph description used by the RB3 Gen 2 >> Industrial mezzanine Bluetooth UART overlay. > > NAK, there is no such overlay. > > Best regards, > Krzysztof Hi Dmitry, Krzysztof, Ack, I will rework this patch in v2. For the commit message, I will explain the reason first and then describe the actual change. For the overlay reference, I was referring to patch 3 in this same series, but I agree the commit message should not justify the SoC dtsi change by referring to a board overlay. I will make this patch stand on its own by explaining that compatible = "pciclass,0604" is needed on the pcie0_port node in kodiak.dtsi to allow the PCI subsystem to associate the DT node with the PCI-to-PCI bridge device. Thanks, Rahul