Re: [PATCH 03/26] cxl/mem: Read dynamic capacity configuration from the device

Ira Weiny
2024-04-03T22:41:36Z

fan wrote:
> On Sun, Mar 24, 2024 at 04:18:06PM -0700, ira.weiny@intel.com wrote:
> > From: Navneet Singh <navneet.singh@intel.com>
> >

[snip]

> >
> > +struct cxl_mbox_get_dc_config_in {
> > + u8 region_count;
> > + u8 start_region_index;
> > +} __packed;
> > +
> > +/* See CXL 3.0 Table 125 get dynamic capacity config Output Payload */
> > +struct cxl_mbox_get_dc_config_out {
> > + u8 avail_region_count;
> > + u8 rsvd[7];
> > + struct cxl_dc_region_config {
> > + __le64 region_base;
> > + __le64 region_decode_length;
> > + __le64 region_length;
> > + __le64 region_block_size;
> > + __le32 region_dsmad_handle;
> > + u8 flags;
> > + u8 rsvd[3];
> > + } __packed region[];
> > +} __packed;
> > +#define CXL_DYNAMIC_CAPACITY_SANITIZE_ON_RELEASE_FLAG BIT(0)
> > +#define CXL_REGIONS_RETURNED(size_out) \
> > + ((size_out - 8) / sizeof(struct cxl_dc_region_config))
>
> Although the result may be unchanged, but in cxl spec r3.1, there are four
> fields after the region configuration structure.

Yes. This macro is not needed.

The fields after the structure are of little use to the host at this time.
So I'm going to leave them out until a use can be found for them.

Ira