From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: <ira.weiny@intel.com>
Cc: Dave Jiang <dave.jiang@intel.com>, Fan Ni <fan.ni@samsung.com>,
"Navneet Singh" <navneet.singh@intel.com>,
Jonathan Corbet <corbet@lwn.net>,
"Andrew Morton" <akpm@linux-foundation.org>,
Dan Williams <dan.j.williams@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
"Alison Schofield" <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
<linux-btrfs@vger.kernel.org>, <linux-cxl@vger.kernel.org>,
<linux-doc@vger.kernel.org>, <nvdimm@lists.linux.dev>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v4 11/28] cxl/hdm: Add dynamic capacity size support to endpoint decoders
Date: Thu, 10 Oct 2024 13:45:33 +0100 [thread overview]
Message-ID: <20241010134533.00002750@Huawei.com> (raw)
In-Reply-To: <20241007-dcd-type2-upstream-v4-11-c261ee6eeded@intel.com>
On Mon, 07 Oct 2024 18:16:17 -0500
ira.weiny@intel.com wrote:
> From: Navneet Singh <navneet.singh@intel.com>
>
> To support Dynamic Capacity Devices (DCD) endpoint decoders will need to
> map DC partitions (regions). In addition to assigning the size of the
> DC partition, the decoder must assign any skip value from the previous
> decoder. This must be done within a contiguous DPA space.
>
> Two complications arise with Dynamic Capacity regions which did not
> exist with Ram and PMEM partitions. First, gaps in the DPA space can
> exist between and around the DC partitions. Second, the Linux resource
> tree does not allow a resource to be marked across existing nodes within
> a tree.
>
> For clarity, below is an example of an 60GB device with 10GB of RAM,
> 10GB of PMEM and 10GB for each of 2 DC partitions. The desired CXL
> mapping is 5GB of RAM, 5GB of PMEM, and 5GB of DC1.
>
> DPA RANGE
> (dpa_res)
> 0GB 10GB 20GB 30GB 40GB 50GB 60GB
> |----------|----------|----------|----------|----------|----------|
>
> RAM PMEM DC0 DC1
> (ram_res) (pmem_res) (dc_res[0]) (dc_res[1])
> |----------|----------| <gap> |----------| <gap> |----------|
>
> RAM PMEM DC1
> |XXXXX|----|XXXXX|----|----------|----------|----------|XXXXX-----|
> 0GB 5GB 10GB 15GB 20GB 30GB 40GB 50GB 60GB
>
> The previous skip resource between RAM and PMEM was always a child of
> the RAM resource and fit nicely [see (S) below]. Because of this
> simplicity this skip resource reference was not stored in any CXL state.
> On release the skip range could be calculated based on the endpoint
> decoders stored values.
>
> Now when DC1 is being mapped 4 skip resources must be created as
> children. One for the PMEM resource (A), two of the parent DPA resource
> (B,D), and one more child of the DC0 resource (C).
>
> 0GB 10GB 20GB 30GB 40GB 50GB 60GB
> |----------|----------|----------|----------|----------|----------|
> | |
> |----------|----------| | |----------| | |----------|
> | | | | |
> (S) (A) (B) (C) (D)
> v v v v v
> |XXXXX|----|XXXXX|----|----------|----------|----------|XXXXX-----|
> skip skip skip skip skip
>
> Expand the calculation of DPA free space and enhance the logic to
> support this more complex skipping. To track the potential of multiple
> skip resources an xarray is attached to the endpoint decoder. The
> existing algorithm between RAM and PMEM is consolidated within the new
> one to streamline the code even though the result is the storage of a
> single skip resource in the xarray.
>
> Signed-off-by: Navneet Singh <navneet.singh@intel.com>
> Co-developed-by: Ira Weiny <ira.weiny@intel.com>
> Signed-off-by: Ira Weiny <ira.weiny@intel.com>
One trivial comment inline.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>
> ---
> Changes:
> [djiang: s/skip_res/skip_xa/]
> ---
> drivers/cxl/core/hdm.c | 196 ++++++++++++++++++++++++++++++++++++++++++++----
> drivers/cxl/core/port.c | 2 +
> drivers/cxl/cxl.h | 2 +
> 3 files changed, 184 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
> index 3df10517a327..8c7f941eaba1 100644
> --- a/drivers/cxl/core/hdm.c
> +++ b/drivers/cxl/core/hdm.c
> @@ -223,6 +223,25 @@ void cxl_dpa_debug(struct seq_file *file, struct cxl_dev_state *cxlds)
> }
> EXPORT_SYMBOL_NS_GPL(cxl_dpa_debug, CXL);
>
> +static void cxl_skip_release(struct cxl_endpoint_decoder *cxled)
> +{
> + struct cxl_dev_state *cxlds = cxled_to_memdev(cxled)->cxlds;
> + struct cxl_port *port = cxled_to_port(cxled);
> + struct device *dev = &port->dev;
> + unsigned long index;
> + void *entry;
> +
> + xa_for_each(&cxled->skip_xa, index, entry) {
> + struct resource *res = entry;
struct resource *res;
xa_for_each(&cxled->skip_xa, index, res) {
as can always cast form a pointer to a void *
and avoiding the extra local variable is a nice to have.
> +
> + dev_dbg(dev, "decoder%d.%d: releasing skipped space; %pr\n",
> + port->id, cxled->cxld.id, res);
> + __release_region(&cxlds->dpa_res, res->start,
> + resource_size(res));
> + xa_erase(&cxled->skip_xa, index);
> + }
> +}
next prev parent reply other threads:[~2024-10-10 12:45 UTC|newest]
Thread overview: 134+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-07 23:16 [PATCH v4 00/28] DCD: Add support for Dynamic Capacity Devices (DCD) Ira Weiny
2024-10-07 23:16 ` [PATCH v4 01/28] test printk: Add very basic struct resource tests Ira Weiny
2024-10-08 16:35 ` Andy Shevchenko
2024-10-09 12:24 ` Jonathan Cameron
2024-10-09 17:09 ` Fan Ni
2024-10-10 14:59 ` Petr Mladek
2024-10-11 14:49 ` Ira Weiny
2024-10-07 23:16 ` [PATCH v4 02/28] printk: Add print format (%pra) for struct range Ira Weiny
2024-10-08 16:56 ` Andy Shevchenko
2024-10-09 12:27 ` Jonathan Cameron
2024-10-09 14:42 ` Andy Shevchenko
2024-10-09 13:30 ` Rasmus Villemoes
2024-10-09 14:41 ` Andy Shevchenko
2024-10-14 0:08 ` Ira Weiny
2024-10-11 16:54 ` Ira Weiny
2024-10-09 17:33 ` Fan Ni
2024-10-11 2:09 ` Bagas Sanjaya
2024-10-17 20:57 ` Ira Weiny
2024-10-25 12:42 ` Bagas Sanjaya
2024-10-07 23:16 ` [PATCH v4 03/28] cxl/cdat: Use %pra for dpa range outputs Ira Weiny
2024-10-09 12:33 ` Jonathan Cameron
2024-10-09 17:34 ` Fan Ni
2024-10-07 23:16 ` [PATCH v4 04/28] range: Add range_overlaps() Ira Weiny
2024-10-08 16:10 ` David Sterba
2024-10-09 14:45 ` Andy Shevchenko
2024-10-09 14:46 ` Andy Shevchenko
2024-10-14 0:12 ` Ira Weiny
2024-10-09 15:36 ` David Sterba
2024-10-09 16:04 ` Andy Shevchenko
2024-10-10 15:24 ` Ira Weiny
2024-10-07 23:16 ` [PATCH v4 05/28] dax: Document dax dev range tuple Ira Weiny
2024-10-09 12:42 ` Jonathan Cameron
2024-10-11 20:40 ` Ira Weiny
2024-10-16 15:48 ` Jonathan Cameron
2024-10-07 23:16 ` [PATCH v4 06/28] cxl/pci: Delay event buffer allocation Ira Weiny
2024-10-09 17:47 ` Fan Ni
2024-10-07 23:16 ` [PATCH v4 07/28] cxl/mbox: Flag support for Dynamic Capacity Devices (DCD) ira.weiny
2024-10-07 23:16 ` [PATCH v4 08/28] cxl/mem: Read dynamic capacity configuration from the device ira.weiny
2024-10-09 12:49 ` Jonathan Cameron
2024-10-14 0:05 ` Ira Weiny
2024-10-16 15:54 ` Jonathan Cameron
2024-10-16 16:59 ` Kees Cook
2024-10-07 23:16 ` [PATCH v4 09/28] cxl/core: Separate region mode from decoder mode ira.weiny
2024-10-09 12:51 ` Jonathan Cameron
2024-10-09 18:06 ` Fan Ni
2024-10-07 23:16 ` [PATCH v4 10/28] cxl/region: Add dynamic capacity decoder and region modes ira.weiny
2024-10-07 23:16 ` [PATCH v4 11/28] cxl/hdm: Add dynamic capacity size support to endpoint decoders ira.weiny
2024-10-10 12:45 ` Jonathan Cameron [this message]
2024-10-07 23:16 ` [PATCH v4 12/28] cxl/cdat: Gather DSMAS data for DCD regions Ira Weiny
2024-10-09 14:42 ` Rafael J. Wysocki
2024-10-11 20:38 ` Ira Weiny
2024-10-14 20:52 ` Wysocki, Rafael J
2024-10-09 18:16 ` Fan Ni
2024-10-14 1:16 ` Ira Weiny
2024-10-10 12:51 ` Jonathan Cameron
2024-10-07 23:16 ` [PATCH v4 13/28] cxl/mem: Expose DCD partition capabilities in sysfs ira.weiny
2024-10-09 20:46 ` Fan Ni
2024-10-14 1:34 ` Ira Weiny
2024-10-10 13:04 ` Jonathan Cameron
2024-10-16 21:34 ` Ira Weiny
2024-10-11 2:15 ` Bagas Sanjaya
2024-10-07 23:16 ` [PATCH v4 14/28] cxl/port: Add endpoint decoder DC mode support to sysfs ira.weiny
2024-10-10 13:14 ` Jonathan Cameron
2024-10-17 17:51 ` Ira Weiny
2024-10-07 23:16 ` [PATCH v4 15/28] cxl/region: Refactor common create region code Ira Weiny
2024-10-10 13:18 ` Jonathan Cameron
2024-10-17 20:29 ` Ira Weiny
2024-10-10 16:27 ` Fan Ni
2024-10-24 2:17 ` Alison Schofield
2024-10-07 23:16 ` [PATCH v4 16/28] cxl/region: Add sparse DAX region support ira.weiny
2024-10-10 13:46 ` Jonathan Cameron
2024-10-10 17:41 ` Fan Ni
2024-10-07 23:16 ` [PATCH v4 17/28] cxl/events: Split event msgnum configuration from irq setup Ira Weiny
2024-10-10 13:49 ` Jonathan Cameron
2024-10-10 17:58 ` Fan Ni
2024-10-24 2:33 ` Ira Weiny
2024-10-07 23:16 ` [PATCH v4 18/28] cxl/pci: Factor out interrupt policy check Ira Weiny
2024-10-10 18:07 ` Fan Ni
2024-10-07 23:16 ` [PATCH v4 19/28] cxl/mem: Configure dynamic capacity interrupts ira.weiny
2024-10-10 14:15 ` Jonathan Cameron
2024-10-10 18:25 ` Fan Ni
2024-10-24 3:09 ` Ira Weiny
2024-10-07 23:16 ` [PATCH v4 20/28] cxl/core: Return endpoint decoder information from region search Ira Weiny
2024-10-10 14:21 ` Jonathan Cameron
2024-10-10 18:29 ` Fan Ni
2024-10-24 2:30 ` Alison Schofield
2024-10-07 23:16 ` [PATCH v4 21/28] cxl/extent: Process DCD events and realize region extents ira.weiny
2024-10-09 1:56 ` Li, Ming4
2024-10-09 19:49 ` Ira Weiny
2024-10-10 3:06 ` Li, Ming4
2024-10-14 2:05 ` Ira Weiny
2024-10-10 14:50 ` Jonathan Cameron
2024-10-11 19:14 ` Fan Ni
2024-10-17 21:15 ` Ira Weiny
2024-10-18 9:03 ` Jonathan Cameron
2024-10-21 14:04 ` Ira Weiny
2024-10-21 14:47 ` Jonathan Cameron
2024-10-10 14:58 ` Jonathan Cameron
2024-10-17 21:39 ` Ira Weiny
2024-10-18 9:09 ` Jonathan Cameron
2024-10-21 18:45 ` Ira Weiny
2024-10-22 17:01 ` Jonathan Cameron
2024-10-07 23:16 ` [PATCH v4 22/28] cxl/region/extent: Expose region extent information in sysfs ira.weiny
2024-10-10 15:01 ` Jonathan Cameron
2024-10-18 18:26 ` Ira Weiny
2024-10-21 9:37 ` Jonathan Cameron
2024-10-14 16:08 ` Fan Ni
2024-10-07 23:16 ` [PATCH v4 23/28] dax/bus: Factor out dev dax resize logic Ira Weiny
2024-10-10 15:06 ` Jonathan Cameron
2024-10-21 21:16 ` Ira Weiny
2024-10-14 16:56 ` Fan Ni
2024-10-07 23:16 ` [PATCH v4 24/28] dax/region: Create resources on sparse DAX regions ira.weiny
2024-10-10 15:27 ` Jonathan Cameron
2024-10-23 1:20 ` Ira Weiny
2024-10-23 11:22 ` Jonathan Cameron
2024-10-24 3:50 ` Ira Weiny
2024-10-07 23:16 ` [PATCH v4 25/28] cxl/region: Read existing extents on region creation ira.weiny
2024-10-10 15:33 ` Jonathan Cameron
2024-10-24 1:41 ` Ira Weiny
2024-10-07 23:16 ` [PATCH v4 26/28] cxl/mem: Trace Dynamic capacity Event Record ira.weiny
2024-10-10 15:41 ` Jonathan Cameron
2024-10-24 1:52 ` Ira Weiny
2024-10-07 23:16 ` [PATCH v4 27/28] tools/testing/cxl: Make event logs dynamic Ira Weiny
2024-10-10 15:49 ` Jonathan Cameron
2024-10-24 1:59 ` Ira Weiny
2024-10-07 23:16 ` [PATCH v4 28/28] tools/testing/cxl: Add DC Regions to mock mem data Ira Weiny
2024-10-10 15:58 ` Jonathan Cameron
2024-10-24 2:23 ` Ira Weiny
2024-10-08 22:57 ` [PATCH v4 00/28] DCD: Add support for Dynamic Capacity Devices (DCD) Fan Ni
2024-10-08 23:06 ` Fan Ni
2024-10-10 15:30 ` Ira Weiny
2024-10-10 15:31 ` Ira Weiny
2024-10-21 16:47 ` Fan Ni
2024-10-22 17:05 ` Jonathan Cameron
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