From: Christoph Hellwig <hch@lst.de>
To: Andrew Morton <akpm@linux-foundation.org>
Cc: Richard Henderson <richard.henderson@linaro.org>,
Matt Turner <mattst88@gmail.com>,
Magnus Lindholm <linmag7@gmail.com>,
Russell King <linux@armlinux.org.uk>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Ard Biesheuvel <ardb@kernel.org>,
Huacai Chen <chenhuacai@kernel.org>,
WANG Xuerui <kernel@xen0n.name>,
Madhavan Srinivasan <maddy@linux.ibm.com>,
Michael Ellerman <mpe@ellerman.id.au>,
Nicholas Piggin <npiggin@gmail.com>,
"Christophe Leroy (CS GROUP)" <chleroy@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Heiko Carstens <hca@linux.ibm.com>,
Vasily Gorbik <gor@linux.ibm.com>,
Alexander Gordeev <agordeev@linux.ibm.com>,
Christian Borntraeger <borntraeger@linux.ibm.com>,
Sven Schnelle <svens@linux.ibm.com>,
"David S. Miller" <davem@davemloft.net>,
Andreas Larsson <andreas@gaisler.com>,
Richard Weinberger <richard@nod.at>,
Anton Ivanov <anton.ivanov@cambridgegreys.com>,
Johannes Berg <johannes@sipsolutions.net>,
Thomas Gleixner <tglx@kernel.org>, Ingo Molnar <mingo@redhat.com>,
Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
Herbert Xu <herbert@gondor.apana.org.au>,
Dan Williams <dan.j.williams@intel.com>, Chris Mason <clm@fb.com>,
David Sterba <dsterba@suse.com>, Arnd Bergmann <arnd@arndb.de>,
Song Liu <song@kernel.org>, Yu Kuai <yukuai@fnnas.com>,
Li Nan <linan122@huawei.com>, "Theodore Ts'o" <tytso@mit.edu>,
"Jason A. Donenfeld" <Jason@zx2c4.com>,
linux-alpha@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, loongarch@lists.linux.dev,
linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org,
linux-s390@vger.kernel.org, sparclinux@vger.kernel.org,
linux-um@lists.infradead.org, linux-crypto@vger.kernel.org,
linux-btrfs@vger.kernel.org, linux-arch@vger.kernel.org,
linux-raid@vger.kernel.org
Subject: [PATCH 11/26] arm: move the XOR code to lib/raid/
Date: Tue, 24 Mar 2026 07:21:47 +0100 [thread overview]
Message-ID: <20260324062211.3216301-12-hch@lst.de> (raw)
In-Reply-To: <20260324062211.3216301-1-hch@lst.de>
Move the optimized XOR into lib/raid and include it it in the main
xor.ko instead of building a separate module for it.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/arm/include/asm/xor.h | 190 +-----------------
arch/arm/lib/Makefile | 5 -
lib/raid/xor/Makefile | 8 +
lib/raid/xor/arm/xor-neon-glue.c | 58 ++++++
{arch/arm/lib => lib/raid/xor/arm}/xor-neon.c | 10 +-
lib/raid/xor/arm/xor.c | 136 +++++++++++++
6 files changed, 205 insertions(+), 202 deletions(-)
create mode 100644 lib/raid/xor/arm/xor-neon-glue.c
rename {arch/arm/lib => lib/raid/xor/arm}/xor-neon.c (74%)
create mode 100644 lib/raid/xor/arm/xor.c
diff --git a/arch/arm/include/asm/xor.h b/arch/arm/include/asm/xor.h
index b2dcd49186e2..989c55872ef6 100644
--- a/arch/arm/include/asm/xor.h
+++ b/arch/arm/include/asm/xor.h
@@ -1,198 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
- * arch/arm/include/asm/xor.h
- *
* Copyright (C) 2001 Russell King
*/
#include <asm-generic/xor.h>
-#include <asm/hwcap.h>
#include <asm/neon.h>
-#define __XOR(a1, a2) a1 ^= a2
-
-#define GET_BLOCK_2(dst) \
- __asm__("ldmia %0, {%1, %2}" \
- : "=r" (dst), "=r" (a1), "=r" (a2) \
- : "0" (dst))
-
-#define GET_BLOCK_4(dst) \
- __asm__("ldmia %0, {%1, %2, %3, %4}" \
- : "=r" (dst), "=r" (a1), "=r" (a2), "=r" (a3), "=r" (a4) \
- : "0" (dst))
-
-#define XOR_BLOCK_2(src) \
- __asm__("ldmia %0!, {%1, %2}" \
- : "=r" (src), "=r" (b1), "=r" (b2) \
- : "0" (src)); \
- __XOR(a1, b1); __XOR(a2, b2);
-
-#define XOR_BLOCK_4(src) \
- __asm__("ldmia %0!, {%1, %2, %3, %4}" \
- : "=r" (src), "=r" (b1), "=r" (b2), "=r" (b3), "=r" (b4) \
- : "0" (src)); \
- __XOR(a1, b1); __XOR(a2, b2); __XOR(a3, b3); __XOR(a4, b4)
-
-#define PUT_BLOCK_2(dst) \
- __asm__ __volatile__("stmia %0!, {%2, %3}" \
- : "=r" (dst) \
- : "0" (dst), "r" (a1), "r" (a2))
-
-#define PUT_BLOCK_4(dst) \
- __asm__ __volatile__("stmia %0!, {%2, %3, %4, %5}" \
- : "=r" (dst) \
- : "0" (dst), "r" (a1), "r" (a2), "r" (a3), "r" (a4))
-
-static void
-xor_arm4regs_2(unsigned long bytes, unsigned long * __restrict p1,
- const unsigned long * __restrict p2)
-{
- unsigned int lines = bytes / sizeof(unsigned long) / 4;
- register unsigned int a1 __asm__("r4");
- register unsigned int a2 __asm__("r5");
- register unsigned int a3 __asm__("r6");
- register unsigned int a4 __asm__("r10");
- register unsigned int b1 __asm__("r8");
- register unsigned int b2 __asm__("r9");
- register unsigned int b3 __asm__("ip");
- register unsigned int b4 __asm__("lr");
-
- do {
- GET_BLOCK_4(p1);
- XOR_BLOCK_4(p2);
- PUT_BLOCK_4(p1);
- } while (--lines);
-}
-
-static void
-xor_arm4regs_3(unsigned long bytes, unsigned long * __restrict p1,
- const unsigned long * __restrict p2,
- const unsigned long * __restrict p3)
-{
- unsigned int lines = bytes / sizeof(unsigned long) / 4;
- register unsigned int a1 __asm__("r4");
- register unsigned int a2 __asm__("r5");
- register unsigned int a3 __asm__("r6");
- register unsigned int a4 __asm__("r10");
- register unsigned int b1 __asm__("r8");
- register unsigned int b2 __asm__("r9");
- register unsigned int b3 __asm__("ip");
- register unsigned int b4 __asm__("lr");
-
- do {
- GET_BLOCK_4(p1);
- XOR_BLOCK_4(p2);
- XOR_BLOCK_4(p3);
- PUT_BLOCK_4(p1);
- } while (--lines);
-}
-
-static void
-xor_arm4regs_4(unsigned long bytes, unsigned long * __restrict p1,
- const unsigned long * __restrict p2,
- const unsigned long * __restrict p3,
- const unsigned long * __restrict p4)
-{
- unsigned int lines = bytes / sizeof(unsigned long) / 2;
- register unsigned int a1 __asm__("r8");
- register unsigned int a2 __asm__("r9");
- register unsigned int b1 __asm__("ip");
- register unsigned int b2 __asm__("lr");
-
- do {
- GET_BLOCK_2(p1);
- XOR_BLOCK_2(p2);
- XOR_BLOCK_2(p3);
- XOR_BLOCK_2(p4);
- PUT_BLOCK_2(p1);
- } while (--lines);
-}
-
-static void
-xor_arm4regs_5(unsigned long bytes, unsigned long * __restrict p1,
- const unsigned long * __restrict p2,
- const unsigned long * __restrict p3,
- const unsigned long * __restrict p4,
- const unsigned long * __restrict p5)
-{
- unsigned int lines = bytes / sizeof(unsigned long) / 2;
- register unsigned int a1 __asm__("r8");
- register unsigned int a2 __asm__("r9");
- register unsigned int b1 __asm__("ip");
- register unsigned int b2 __asm__("lr");
-
- do {
- GET_BLOCK_2(p1);
- XOR_BLOCK_2(p2);
- XOR_BLOCK_2(p3);
- XOR_BLOCK_2(p4);
- XOR_BLOCK_2(p5);
- PUT_BLOCK_2(p1);
- } while (--lines);
-}
-
-static struct xor_block_template xor_block_arm4regs = {
- .name = "arm4regs",
- .do_2 = xor_arm4regs_2,
- .do_3 = xor_arm4regs_3,
- .do_4 = xor_arm4regs_4,
- .do_5 = xor_arm4regs_5,
-};
-
-#ifdef CONFIG_KERNEL_MODE_NEON
-
-extern struct xor_block_template const xor_block_neon_inner;
-
-static void
-xor_neon_2(unsigned long bytes, unsigned long * __restrict p1,
- const unsigned long * __restrict p2)
-{
- kernel_neon_begin();
- xor_block_neon_inner.do_2(bytes, p1, p2);
- kernel_neon_end();
-}
-
-static void
-xor_neon_3(unsigned long bytes, unsigned long * __restrict p1,
- const unsigned long * __restrict p2,
- const unsigned long * __restrict p3)
-{
- kernel_neon_begin();
- xor_block_neon_inner.do_3(bytes, p1, p2, p3);
- kernel_neon_end();
-}
-
-static void
-xor_neon_4(unsigned long bytes, unsigned long * __restrict p1,
- const unsigned long * __restrict p2,
- const unsigned long * __restrict p3,
- const unsigned long * __restrict p4)
-{
- kernel_neon_begin();
- xor_block_neon_inner.do_4(bytes, p1, p2, p3, p4);
- kernel_neon_end();
-}
-
-static void
-xor_neon_5(unsigned long bytes, unsigned long * __restrict p1,
- const unsigned long * __restrict p2,
- const unsigned long * __restrict p3,
- const unsigned long * __restrict p4,
- const unsigned long * __restrict p5)
-{
- kernel_neon_begin();
- xor_block_neon_inner.do_5(bytes, p1, p2, p3, p4, p5);
- kernel_neon_end();
-}
-
-static struct xor_block_template xor_block_neon = {
- .name = "neon",
- .do_2 = xor_neon_2,
- .do_3 = xor_neon_3,
- .do_4 = xor_neon_4,
- .do_5 = xor_neon_5
-};
-
-#endif /* CONFIG_KERNEL_MODE_NEON */
+extern struct xor_block_template xor_block_arm4regs;
+extern struct xor_block_template xor_block_neon;
#define arch_xor_init arch_xor_init
static __always_inline void __init arch_xor_init(void)
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 0ca5aae1bcc3..9295055cdfc9 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -39,9 +39,4 @@ endif
$(obj)/csumpartialcopy.o: $(obj)/csumpartialcopygeneric.S
$(obj)/csumpartialcopyuser.o: $(obj)/csumpartialcopygeneric.S
-ifeq ($(CONFIG_KERNEL_MODE_NEON),y)
- CFLAGS_xor-neon.o += $(CC_FLAGS_FPU)
- obj-$(CONFIG_XOR_BLOCKS) += xor-neon.o
-endif
-
obj-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o
diff --git a/lib/raid/xor/Makefile b/lib/raid/xor/Makefile
index 6d03c27c37c7..fb760edae54b 100644
--- a/lib/raid/xor/Makefile
+++ b/lib/raid/xor/Makefile
@@ -9,3 +9,11 @@ xor-y += xor-8regs-prefetch.o
xor-y += xor-32regs-prefetch.o
xor-$(CONFIG_ALPHA) += alpha/xor.o
+xor-$(CONFIG_ARM) += arm/xor.o
+ifeq ($(CONFIG_ARM),y)
+xor-$(CONFIG_KERNEL_MODE_NEON) += arm/xor-neon.o arm/xor-neon-glue.o
+endif
+
+
+CFLAGS_arm/xor-neon.o += $(CC_FLAGS_FPU)
+CFLAGS_REMOVE_arm/xor-neon.o += $(CC_FLAGS_NO_FPU)
diff --git a/lib/raid/xor/arm/xor-neon-glue.c b/lib/raid/xor/arm/xor-neon-glue.c
new file mode 100644
index 000000000000..c7b162b383a2
--- /dev/null
+++ b/lib/raid/xor/arm/xor-neon-glue.c
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2001 Russell King
+ */
+#include <linux/raid/xor_impl.h>
+#include <asm/xor.h>
+
+extern struct xor_block_template const xor_block_neon_inner;
+
+static void
+xor_neon_2(unsigned long bytes, unsigned long * __restrict p1,
+ const unsigned long * __restrict p2)
+{
+ kernel_neon_begin();
+ xor_block_neon_inner.do_2(bytes, p1, p2);
+ kernel_neon_end();
+}
+
+static void
+xor_neon_3(unsigned long bytes, unsigned long * __restrict p1,
+ const unsigned long * __restrict p2,
+ const unsigned long * __restrict p3)
+{
+ kernel_neon_begin();
+ xor_block_neon_inner.do_3(bytes, p1, p2, p3);
+ kernel_neon_end();
+}
+
+static void
+xor_neon_4(unsigned long bytes, unsigned long * __restrict p1,
+ const unsigned long * __restrict p2,
+ const unsigned long * __restrict p3,
+ const unsigned long * __restrict p4)
+{
+ kernel_neon_begin();
+ xor_block_neon_inner.do_4(bytes, p1, p2, p3, p4);
+ kernel_neon_end();
+}
+
+static void
+xor_neon_5(unsigned long bytes, unsigned long * __restrict p1,
+ const unsigned long * __restrict p2,
+ const unsigned long * __restrict p3,
+ const unsigned long * __restrict p4,
+ const unsigned long * __restrict p5)
+{
+ kernel_neon_begin();
+ xor_block_neon_inner.do_5(bytes, p1, p2, p3, p4, p5);
+ kernel_neon_end();
+}
+
+struct xor_block_template xor_block_neon = {
+ .name = "neon",
+ .do_2 = xor_neon_2,
+ .do_3 = xor_neon_3,
+ .do_4 = xor_neon_4,
+ .do_5 = xor_neon_5
+};
diff --git a/arch/arm/lib/xor-neon.c b/lib/raid/xor/arm/xor-neon.c
similarity index 74%
rename from arch/arm/lib/xor-neon.c
rename to lib/raid/xor/arm/xor-neon.c
index b5be50567991..c9d4378b0f0e 100644
--- a/arch/arm/lib/xor-neon.c
+++ b/lib/raid/xor/arm/xor-neon.c
@@ -1,16 +1,9 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
- * linux/arch/arm/lib/xor-neon.c
- *
* Copyright (C) 2013 Linaro Ltd <ard.biesheuvel@linaro.org>
*/
-#include <linux/raid/xor.h>
#include <linux/raid/xor_impl.h>
-#include <linux/module.h>
-
-MODULE_DESCRIPTION("NEON accelerated XOR implementation");
-MODULE_LICENSE("GPL");
#ifndef __ARM_NEON__
#error You should compile this file with '-march=armv7-a -mfloat-abi=softfp -mfpu=neon'
@@ -27,7 +20,7 @@ MODULE_LICENSE("GPL");
#endif
#define NO_TEMPLATE
-#include "../../../lib/raid/xor/xor-8regs.c"
+#include "../xor-8regs.c"
struct xor_block_template const xor_block_neon_inner = {
.name = "__inner_neon__",
@@ -36,4 +29,3 @@ struct xor_block_template const xor_block_neon_inner = {
.do_4 = xor_8regs_4,
.do_5 = xor_8regs_5,
};
-EXPORT_SYMBOL(xor_block_neon_inner);
diff --git a/lib/raid/xor/arm/xor.c b/lib/raid/xor/arm/xor.c
new file mode 100644
index 000000000000..2263341dbbcd
--- /dev/null
+++ b/lib/raid/xor/arm/xor.c
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2001 Russell King
+ */
+#include <linux/raid/xor_impl.h>
+#include <asm/xor.h>
+
+#define __XOR(a1, a2) a1 ^= a2
+
+#define GET_BLOCK_2(dst) \
+ __asm__("ldmia %0, {%1, %2}" \
+ : "=r" (dst), "=r" (a1), "=r" (a2) \
+ : "0" (dst))
+
+#define GET_BLOCK_4(dst) \
+ __asm__("ldmia %0, {%1, %2, %3, %4}" \
+ : "=r" (dst), "=r" (a1), "=r" (a2), "=r" (a3), "=r" (a4) \
+ : "0" (dst))
+
+#define XOR_BLOCK_2(src) \
+ __asm__("ldmia %0!, {%1, %2}" \
+ : "=r" (src), "=r" (b1), "=r" (b2) \
+ : "0" (src)); \
+ __XOR(a1, b1); __XOR(a2, b2);
+
+#define XOR_BLOCK_4(src) \
+ __asm__("ldmia %0!, {%1, %2, %3, %4}" \
+ : "=r" (src), "=r" (b1), "=r" (b2), "=r" (b3), "=r" (b4) \
+ : "0" (src)); \
+ __XOR(a1, b1); __XOR(a2, b2); __XOR(a3, b3); __XOR(a4, b4)
+
+#define PUT_BLOCK_2(dst) \
+ __asm__ __volatile__("stmia %0!, {%2, %3}" \
+ : "=r" (dst) \
+ : "0" (dst), "r" (a1), "r" (a2))
+
+#define PUT_BLOCK_4(dst) \
+ __asm__ __volatile__("stmia %0!, {%2, %3, %4, %5}" \
+ : "=r" (dst) \
+ : "0" (dst), "r" (a1), "r" (a2), "r" (a3), "r" (a4))
+
+static void
+xor_arm4regs_2(unsigned long bytes, unsigned long * __restrict p1,
+ const unsigned long * __restrict p2)
+{
+ unsigned int lines = bytes / sizeof(unsigned long) / 4;
+ register unsigned int a1 __asm__("r4");
+ register unsigned int a2 __asm__("r5");
+ register unsigned int a3 __asm__("r6");
+ register unsigned int a4 __asm__("r10");
+ register unsigned int b1 __asm__("r8");
+ register unsigned int b2 __asm__("r9");
+ register unsigned int b3 __asm__("ip");
+ register unsigned int b4 __asm__("lr");
+
+ do {
+ GET_BLOCK_4(p1);
+ XOR_BLOCK_4(p2);
+ PUT_BLOCK_4(p1);
+ } while (--lines);
+}
+
+static void
+xor_arm4regs_3(unsigned long bytes, unsigned long * __restrict p1,
+ const unsigned long * __restrict p2,
+ const unsigned long * __restrict p3)
+{
+ unsigned int lines = bytes / sizeof(unsigned long) / 4;
+ register unsigned int a1 __asm__("r4");
+ register unsigned int a2 __asm__("r5");
+ register unsigned int a3 __asm__("r6");
+ register unsigned int a4 __asm__("r10");
+ register unsigned int b1 __asm__("r8");
+ register unsigned int b2 __asm__("r9");
+ register unsigned int b3 __asm__("ip");
+ register unsigned int b4 __asm__("lr");
+
+ do {
+ GET_BLOCK_4(p1);
+ XOR_BLOCK_4(p2);
+ XOR_BLOCK_4(p3);
+ PUT_BLOCK_4(p1);
+ } while (--lines);
+}
+
+static void
+xor_arm4regs_4(unsigned long bytes, unsigned long * __restrict p1,
+ const unsigned long * __restrict p2,
+ const unsigned long * __restrict p3,
+ const unsigned long * __restrict p4)
+{
+ unsigned int lines = bytes / sizeof(unsigned long) / 2;
+ register unsigned int a1 __asm__("r8");
+ register unsigned int a2 __asm__("r9");
+ register unsigned int b1 __asm__("ip");
+ register unsigned int b2 __asm__("lr");
+
+ do {
+ GET_BLOCK_2(p1);
+ XOR_BLOCK_2(p2);
+ XOR_BLOCK_2(p3);
+ XOR_BLOCK_2(p4);
+ PUT_BLOCK_2(p1);
+ } while (--lines);
+}
+
+static void
+xor_arm4regs_5(unsigned long bytes, unsigned long * __restrict p1,
+ const unsigned long * __restrict p2,
+ const unsigned long * __restrict p3,
+ const unsigned long * __restrict p4,
+ const unsigned long * __restrict p5)
+{
+ unsigned int lines = bytes / sizeof(unsigned long) / 2;
+ register unsigned int a1 __asm__("r8");
+ register unsigned int a2 __asm__("r9");
+ register unsigned int b1 __asm__("ip");
+ register unsigned int b2 __asm__("lr");
+
+ do {
+ GET_BLOCK_2(p1);
+ XOR_BLOCK_2(p2);
+ XOR_BLOCK_2(p3);
+ XOR_BLOCK_2(p4);
+ XOR_BLOCK_2(p5);
+ PUT_BLOCK_2(p1);
+ } while (--lines);
+}
+
+struct xor_block_template xor_block_arm4regs = {
+ .name = "arm4regs",
+ .do_2 = xor_arm4regs_2,
+ .do_3 = xor_arm4regs_3,
+ .do_4 = xor_arm4regs_4,
+ .do_5 = xor_arm4regs_5,
+};
--
2.47.3
next prev parent reply other threads:[~2026-03-24 6:25 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-24 6:21 cleanup the RAID5 XOR library v3 Christoph Hellwig
2026-03-24 6:21 ` [PATCH 01/26] xor: assert that xor_blocks is not from preemptible user context Christoph Hellwig
2026-03-24 6:21 ` [PATCH 02/26] arm/xor: remove in_interrupt() handling Christoph Hellwig
2026-03-24 6:21 ` [PATCH 03/26] um/xor: cleanup xor.h Christoph Hellwig
2026-03-24 6:21 ` [PATCH 04/26] xor: move to lib/raid/ Christoph Hellwig
2026-03-24 6:21 ` [PATCH 05/26] xor: small cleanups Christoph Hellwig
2026-03-24 6:21 ` [PATCH 06/26] xor: cleanup registration and probing Christoph Hellwig
2026-03-24 6:21 ` [PATCH 07/26] xor: split xor.h Christoph Hellwig
2026-03-24 6:21 ` [PATCH 08/26] xor: remove macro abuse for XOR implementation registrations Christoph Hellwig
2026-03-24 6:21 ` [PATCH 09/26] xor: move generic implementations out of asm-generic/xor.h Christoph Hellwig
2026-03-24 6:21 ` [PATCH 10/26] alpha: move the XOR code to lib/raid/ Christoph Hellwig
2026-03-24 6:21 ` Christoph Hellwig [this message]
2026-03-24 6:21 ` [PATCH 12/26] arm64: " Christoph Hellwig
2026-03-24 6:21 ` [PATCH 13/26] loongarch: " Christoph Hellwig
2026-03-24 6:21 ` [PATCH 14/26] powerpc: " Christoph Hellwig
2026-03-24 6:21 ` [PATCH 15/26] riscv: " Christoph Hellwig
2026-03-24 6:21 ` [PATCH 16/26] sparc: " Christoph Hellwig
2026-03-24 6:21 ` [PATCH 17/26] s390: " Christoph Hellwig
2026-03-24 6:21 ` [PATCH 18/26] x86: " Christoph Hellwig
2026-03-24 6:21 ` [PATCH 19/26] xor: avoid indirect calls for arm64-optimized ops Christoph Hellwig
2026-03-24 6:21 ` [PATCH 20/26] xor: make xor.ko self-contained in lib/raid/ Christoph Hellwig
2026-03-24 6:21 ` [PATCH 21/26] xor: add a better public API Christoph Hellwig
2026-03-24 6:21 ` [PATCH 22/26] async_xor: use xor_gen Christoph Hellwig
2026-03-24 6:21 ` [PATCH 23/26] btrfs: " Christoph Hellwig
2026-03-24 6:22 ` [PATCH 24/26] xor: pass the entire operation to the low-level ops Christoph Hellwig
2026-03-24 6:22 ` [PATCH 25/26] xor: use static_call for xor_gen Christoph Hellwig
2026-03-24 6:22 ` [PATCH 26/26] xor: add a kunit test case Christoph Hellwig
2026-03-24 12:59 ` cleanup the RAID5 XOR library v3 Andrew Morton
2026-03-24 16:42 ` Andrew Morton
2026-03-25 19:39 ` Eric Biggers
2026-03-26 5:18 ` Christoph Hellwig
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