From: Roger Quadros <rogerq@ti.com>
To: wg@grandegger.com, mkl@pengutronix.de, tony@atomide.com
Cc: tglx@linutronix.de, linux-omap@vger.kernel.org,
linux-can@vger.kernel.org, netdev@vger.kernel.org,
mugunthanvnm@ti.com, george.cherian@ti.com, balbi@ti.com,
nsekhar@ti.comnm@ti.com, Roger Quadros <rogerq@ti.com>
Subject: [PATCH 03/13] net: can: c_can: Add support for START pulse in RAMINIT sequence
Date: Mon, 8 Sep 2014 17:10:32 +0300 [thread overview]
Message-ID: <1410185442-907-4-git-send-email-rogerq@ti.com> (raw)
In-Reply-To: <1410185442-907-1-git-send-email-rogerq@ti.com>
Some SoCs e.g. (TI DRA7xx) need a START pulse to start the
RAMINIT sequence i.e. START bit must be set and cleared before
checking for the DONE bit status. Add a new DT property "raminit-pulse"
to specify if this mechanism must be used for RAMINIT.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
Documentation/devicetree/bindings/net/can/c_can.txt | 3 +++
drivers/net/can/c_can/c_can.h | 1 +
drivers/net/can/c_can/c_can_platform.c | 8 ++++++++
3 files changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/can/c_can.txt b/Documentation/devicetree/bindings/net/can/c_can.txt
index 0856209..2f0a6bb 100644
--- a/Documentation/devicetree/bindings/net/can/c_can.txt
+++ b/Documentation/devicetree/bindings/net/can/c_can.txt
@@ -19,6 +19,9 @@ Optional properties:
register within the syscon region
- raminit-start-bit : Bit posistion of START bit in the RAMINIT register
- raminit-done-bit : Bit position of DONE bit in the RAMINIT register
+- raminit-pulse : Property must exist if START pulse is needed for RAMINIT
+ sequence i.e. START bit will be set and cleared before
+ checking for DONE bit.
Note: "ti,hwmods" field is used to fetch the base address and irq
resources from TI, omap hwmod data base during device registration.
diff --git a/drivers/net/can/c_can/c_can.h b/drivers/net/can/c_can/c_can.h
index bf68822..85b5ad0 100644
--- a/drivers/net/can/c_can/c_can.h
+++ b/drivers/net/can/c_can/c_can.h
@@ -175,6 +175,7 @@ struct c_can_raminit {
unsigned int reg; /* register index within syscon */
u8 start_bit; /* START bit position in raminit reg. */
u8 done_bit; /* DONE bit position in raminit reg. */
+ bool needs_pulse; /* If set, sets and clears START bit (pulse) */
};
/* c_can private data structure */
diff --git a/drivers/net/can/c_can/c_can_platform.c b/drivers/net/can/c_can/c_can_platform.c
index e7ec3b6..bc09695 100644
--- a/drivers/net/can/c_can/c_can_platform.c
+++ b/drivers/net/can/c_can/c_can_platform.c
@@ -123,6 +123,12 @@ static void c_can_hw_raminit_syscon(const struct c_can_priv *priv, bool enable)
ctrl |= 1 << raminit->start_bit;
regmap_write(raminit->syscon, raminit->reg, ctrl);
+ /* clear START bit if start pulse is needed */
+ if (raminit->needs_pulse) {
+ ctrl &= ~(1 << raminit->start_bit);
+ regmap_write(raminit->syscon, raminit->reg, ctrl);
+ }
+
ctrl |= 1 << raminit->done_bit;
c_can_hw_raminit_wait_syscon(priv, mask, ctrl);
}
@@ -343,6 +349,8 @@ static int c_can_plat_probe(struct platform_device *pdev)
}
priv->raminit_sys.done_bit = val;
+ priv->raminit_sys.needs_pulse = of_property_read_bool(np,
+ "raminit-pulse");
priv->raminit = c_can_hw_raminit_syscon;
break;
default:
--
1.8.3.2
next prev parent reply other threads:[~2014-09-08 14:10 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-08 14:10 [PATCH 00/13] net: can: Add can support for TI platforms Roger Quadros
2014-09-08 14:10 ` [PATCH 01/13] can: c_can_platform: Fix c_can_hw_raminit_ti() and add timeout Roger Quadros
2014-09-08 14:10 ` [PATCH 02/13] net: can: c_can: Add syscon/regmap RAMINIT mechanism Roger Quadros
2014-09-08 14:10 ` Roger Quadros [this message]
2014-09-08 14:10 ` [PATCH 04/13] ARM: dts: dra7: Add syscon regmap for CORE CONTROL area Roger Quadros
2014-09-08 17:47 ` Tony Lindgren
2014-09-08 14:10 ` [PATCH 05/13] ARM: dts: DRA7: Add DCAN nodes Roger Quadros
2014-09-08 16:40 ` Sergei Shtylyov
2014-09-09 8:30 ` Roger Quadros
2014-09-09 8:34 ` Marc Kleine-Budde
2014-09-09 8:37 ` Roger Quadros
2014-09-08 14:10 ` [PATCH 06/13] ARM: dts: dra7-evm: Add CAN support Roger Quadros
2014-09-08 14:10 ` [PATCH 07/13] ARM: dts: dra72-evm: " Roger Quadros
2014-09-08 14:10 ` [PATCH 08/13] arm: dts: am4372: Add dcan nodes Roger Quadros
2014-09-08 14:10 ` [PATCH 09/13] ARM: dts: AM43xx: Add aliases to d_can nodes Roger Quadros
2014-09-08 14:10 ` [PATCH 10/13] arm: dts: am437x-gp: Add dcan support Roger Quadros
2014-09-08 14:10 ` [PATCH 11/13] ARM: dts: am437x-gp-evm: Add pinctrl sleep states for dcan pins Roger Quadros
2014-09-08 14:10 ` [PATCH 12/13] ARM: dts: am4372: Add control module syscon node Roger Quadros
2014-09-08 14:10 ` [PATCH 13/13] ARM: dts: am4372: Add dcan raminit bits Roger Quadros
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1410185442-907-4-git-send-email-rogerq@ti.com \
--to=rogerq@ti.com \
--cc=balbi@ti.com \
--cc=george.cherian@ti.com \
--cc=linux-can@vger.kernel.org \
--cc=linux-omap@vger.kernel.org \
--cc=mkl@pengutronix.de \
--cc=mugunthanvnm@ti.com \
--cc=netdev@vger.kernel.org \
--cc=nsekhar@ti.comnm \
--cc=tglx@linutronix.de \
--cc=tony@atomide.com \
--cc=wg@grandegger.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).