From: Marc Kleine-Budde <mkl@pengutronix.de>
To: linux-can@vger.kernel.org
Cc: Marc Kleine-Budde <mkl@pengutronix.de>
Subject: [PATCH 07/10] can: flexcan: activate individual RX masking and initialize reg_rximr
Date: Mon, 9 May 2016 12:52:31 +0200 [thread overview]
Message-ID: <1462791154-13375-8-git-send-email-mkl@pengutronix.de> (raw)
In-Reply-To: <1462791154-13375-1-git-send-email-mkl@pengutronix.de>
Modern flexcan IP cores support two RX modes. One is using the 6 fames deep
hardware FIFO, the other is using up to 64 mailboxes (in non FIFO mode). For
now only the HW FIFO mode is activated.
In order to make use of the RX mailboxes the individual RX masking feature has
to be activated, otherwise matching mailboxes are overwritten during the
reception process. This however switches on the individual RX masking, which
uses reg_rximr registers for masking.
This patch activates the individual RX masking feature unconditionally and
initializes the mask registers (reg_rximr) with 0x0 == "don't care", which
switches off any filtering.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
drivers/net/can/flexcan.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index ef4693b970f4..f4c2bc4935a2 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -815,6 +815,7 @@ static int flexcan_chip_start(struct net_device *dev)
* only supervisor access
* enable warning int
* disable local echo
+ * enable individual RX masking
* choose format C
* set max mailbox number
*/
@@ -822,7 +823,8 @@ static int flexcan_chip_start(struct net_device *dev)
reg_mcr &= ~FLEXCAN_MCR_MAXMB(0xff);
reg_mcr |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_FEN | FLEXCAN_MCR_HALT |
FLEXCAN_MCR_SUPV | FLEXCAN_MCR_WRN_EN | FLEXCAN_MCR_SRX_DIS |
- FLEXCAN_MCR_IDAM_C | FLEXCAN_MCR_MAXMB(priv->tx_mb_idx);
+ FLEXCAN_MCR_IRMQ | FLEXCAN_MCR_IDAM_C |
+ FLEXCAN_MCR_MAXMB(priv->tx_mb_idx);
netdev_dbg(dev, "%s: writing mcr=0x%08x", __func__, reg_mcr);
flexcan_write(reg_mcr, ®s->mcr);
@@ -881,6 +883,10 @@ static int flexcan_chip_start(struct net_device *dev)
if (priv->devtype_data->quirks & FLEXCAN_QUIRK_DISABLE_RXFG)
flexcan_write(0x0, ®s->rxfgmask);
+ /* clear acceptance filters */
+ for (i = 0; i < ARRAY_SIZE(regs->mb); i++)
+ flexcan_write(0, ®s->rximr[i]);
+
/* On Vybrid, disable memory error detection interrupts
* and freeze mode.
* This also works around errata e5295 which generates
--
2.8.1
next prev parent reply other threads:[~2016-05-09 10:52 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-09 10:52 rx-fifo: add implmentation and switch flexcan driver to use it Marc Kleine-Budde
2016-05-09 10:52 ` [PATCH 01/10] can: rx-fifo: Add support for simple irq offloading Marc Kleine-Budde
2016-05-09 10:52 ` [PATCH 02/10] can: rx-fifo: introduce software rx-fifo implementation Marc Kleine-Budde
2016-05-09 10:52 ` [PATCH 03/10] can: flexcan: calculate default value for imask1 during runtime Marc Kleine-Budde
2016-05-09 10:52 ` [PATCH 04/10] can: flexcan: make TX mailbox selectable " Marc Kleine-Budde
2016-05-09 10:52 ` [PATCH 05/10] can: flexcan: make use of rx-fifo's irq_offload_simple Marc Kleine-Budde
2016-05-20 11:31 ` Mirza Krak
2016-05-09 10:52 ` [PATCH 06/10] can: flexcan: add missing register definitions Marc Kleine-Budde
2016-05-09 10:52 ` Marc Kleine-Budde [this message]
2016-05-09 10:52 ` [PATCH 08/10] can: flexcan: add quirk FLEXCAN_QUIRK_ENABLE_EACEN_RRS Marc Kleine-Budde
2016-05-09 10:52 ` [PATCH 09/10] can: flexcan: add support for rx-fifo based software FIFO implementation Marc Kleine-Budde
2016-05-09 10:52 ` [PATCH 10/10] can: flexcan: switch imx6 and vf610 to software based fifo Marc Kleine-Budde
2016-05-09 10:54 ` rx-fifo: add implmentation and switch flexcan driver to use it Marc Kleine-Budde
2016-05-10 8:27 ` Mirza Krak
2016-05-10 12:55 ` Mirza Krak
2016-05-11 9:12 ` Oliver Hartkopp
[not found] ` <CAJ=nTssNPDeGW+pEAHTpa+5ARQCQHfXumE=a=cr9prmjhgeJxQ@mail.gmail.com>
2016-05-11 19:07 ` Mirza Krak
2016-05-13 11:44 ` Tom Evans
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