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From: Pavel Machek <pavel@denx.de>
To: Thor Thayer <tthayer@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>,
	Steffen Trumtrar <s.trumtrar@pengutronix.de>,
	linux-arm-kernel@lists.infradead.org, linux-can@vger.kernel.org,
	socketcan@hartkopp.net, wg@grandegger.com, mkl@pengutronix.de,
	tthayer.linux@gmail.com
Subject: Re: can problems on socfpga [was Re: [PATCH v2 4/6] ARM: socfpga: dts: add can0+1]
Date: Sat, 26 Apr 2014 10:57:07 +0200	[thread overview]
Message-ID: <20140426085707.GA8730@amd.pavel.ucw.cz> (raw)
In-Reply-To: <1398461518.3587.11.camel@dinh-ubuntu>

Hi!

> > > Actually, does it work for you? Here it produces warnings during boot
> > > 
> > > c_can_platform ffc00000.d_can: invalid resource
> > > c_can_platform ffc00000.d_can: control memory is not used for raminit
> > > c_can_platform ffc00000.d_can: c_can_platform device registered
> > > (regs=9085c000, irq=163)
> 
> Hi! Yes, these warnings are being addressed in a patch I submitted that
> is currently being reviewed.
> (http://article.gmane.org/gmane.linux.can/5620/match=tthayer)

That will still produce the 

c_can_platform ffc00000.d_can: invalid resource

message, no? Anyway, I did something along those lines,
too. (untested). I wonder if raminit_type is a good idea... I believe
it would be nicer to just use separate raminit function...

> To get this working well, I had to install a few of the patches that
> Benedict Spranger submitted ([PATCH 05/16] c_can: use 32 bit access for
> D_CAN) on 9/9/2013.

> I have the patches on our rocketboard branch
> (rocketboards.org/gitweb/?p=linux-socfpga-git;a=summary)

Thanks a lot for the pointers. I knew about these, but then forgot.

Best regards,
 									Pavel


[This is what I did for debugging.]

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 5f2c8a4..4bc48cc 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -454,7 +454,7 @@
 		dcan0: d_can@ffc00000 {
 			compatible = "bosch,d_can";
 			reg = <0xffc00000 0x1000>;
-			interrupts = <0 131 4>, <0 132 4>;
+			interrupts = <0 131 4>, <0 132 4>, <0 133 4>, <0 134 4>;
 			clocks = <&can0_clk>;
 			status = "disabled";
 		};
@@ -462,7 +462,7 @@
 		dcan1: d_can@ffc01000 {
 			compatible = "bosch,d_can";
 			reg = <0xffc01000 0x1000>;
-			interrupts = <0 135 4>, <0 136 4>;
+			interrupts = <0 135 4>, <0 136 4>, <0 137 4>, <0 138 4>;
 			clocks = <&can1_clk>;
 			status = "disabled";
 		};
diff --git a/drivers/net/can/c_can/c_can_platform.c b/drivers/net/can/c_can/c_can_platform.c
index 806d927..6d9514d 100644
--- a/drivers/net/can/c_can/c_can_platform.c
+++ b/drivers/net/can/c_can/c_can_platform.c
@@ -80,6 +80,15 @@ static void c_can_hw_raminit_wait(const struct c_can_priv *priv, u32 mask,
 		udelay(1);
 }
 
+/* socfpga has CFR at offset 0x18, bit 0x08 is "request automatic ram init". Needed?
+   CCTRL.1 bit needs to be set for this.
+
+
+   CRR at offset 0x20 should contain revision information.
+
+   HWS contains information about # of objects
+*/
+
 static void c_can_hw_raminit(const struct c_can_priv *priv, bool enable)
 {
 	u32 mask = CAN_RAMINIT_ALL_MASK(priv->instance);
@@ -88,7 +97,8 @@ static void c_can_hw_raminit(const struct c_can_priv *priv, bool enable)
 	spin_lock(&raminit_lock);
 
 	ctrl = readl(priv->raminit_ctrlreg);
-	/* We clear the done and start bit first. The start bit is
+	/*
+	 * We clear the done and start bit first. The start bit is
 	 * looking at the 0 -> transition, but is not self clearing;
 	 * And we clear the init done bit as well.
 	 */
@@ -193,6 +203,8 @@ static int c_can_plat_probe(struct platform_device *pdev)
 		goto exit_iounmap;
 	}
 
+	printk("net device\n");
+
 	priv = netdev_priv(dev);
 	switch (id->driver_data) {
 	case BOSCH_C_CAN:
@@ -220,11 +232,26 @@ static int c_can_plat_probe(struct platform_device *pdev)
 		else
 			priv->instance = pdev->id;
 
+		printk("d_can: get resource\n");
 		res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+		printk("d_can: ioremap_resource\n");
 		priv->raminit_ctrlreg = devm_ioremap_resource(&pdev->dev, res);
-		if (IS_ERR(priv->raminit_ctrlreg) || (int)priv->instance < 0)
+		if (IS_ERR(priv->raminit_ctrlreg) || (int)priv->instance < 0) {
+			u32 version;
 			dev_info(&pdev->dev, "control memory is not used for raminit\n");
-		else
+			
+#if 0
+			version = readl(addr + 0x20); /* CRR */
+			printk("Version, should be 11161128: %lx\n", version);
+			/* CFR */
+			writel(8, addr + 0x18);
+			if (!(readl(addr + 0x18) & 8))
+				printk("Not initializing?\n");
+
+			while (readl(addr + 0x18) & 8)
+				printk("Waiting for init...\n");
+#endif			
+		} else
 			priv->raminit = c_can_hw_raminit;
 		break;
 	default:
@@ -242,6 +269,8 @@ static int c_can_plat_probe(struct platform_device *pdev)
 	platform_set_drvdata(pdev, dev);
 	SET_NETDEV_DEV(dev, &pdev->dev);
 
+	printk("..register\n");
+
 	ret = register_c_can_dev(dev);
 	if (ret) {
 		dev_err(&pdev->dev, "registering %s failed (err=%d)\n",


-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

  reply	other threads:[~2014-04-26  8:57 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1396422700-3962-1-git-send-email-s.trumtrar@pengutronix.de>
     [not found] ` <1396422700-3962-4-git-send-email-s.trumtrar@pengutronix.de>
     [not found]   ` <20140404102815.GA9242@amd.pavel.ucw.cz>
2014-04-25 19:53     ` can problems on socfpga [was Re: [PATCH v2 4/6] ARM: socfpga: dts: add can0+1] Pavel Machek
2014-04-25 20:24       ` Dinh Nguyen
2014-04-25 21:31         ` Thor Thayer
2014-04-26  8:57           ` Pavel Machek [this message]
2014-04-26  9:16           ` Pavel Machek
2014-04-26  9:36           ` Pavel Machek
2014-04-26 20:31             ` Pavel Machek
2014-04-26 20:51               ` Oliver Hartkopp
2014-04-26 22:37               ` Marc Kleine-Budde
2014-04-27 12:25                 ` [patch] Fix CAN on socfpga, for net/master Pavel Machek
2014-04-28 20:20                   ` Thor Thayer
2014-04-28 21:15                     ` Pavel Machek
2014-04-28 23:37                       ` T Thayer
     [not found]                         ` <CAF03EBd19PC5RAsLR6-dMPF2x3XRf9X4bFPgX2kRdCYWUQBYcA@mail.gmail.com>
2014-04-30 21:53                           ` Pavel Machek
2014-05-01 13:15                             ` Thor Thayer
2014-05-02  8:48                               ` [PATCHv2] " Pavel Machek
2014-05-02 12:27                                 ` Marc Kleine-Budde
2014-05-05 12:07                                   ` Pavel Machek
2014-05-13 12:07                                   ` Pavel Machek
2014-05-05 12:08                                 ` [PATCH 2/2] Add 32-bit accesses Pavel Machek
2014-05-05 12:40                                   ` Marc Kleine-Budde
2014-05-06 13:57                                   ` [PATCHv3] C_CAN: " Pavel Machek
2014-05-12 15:47                                     ` Marc Kleine-Budde
2014-05-13 11:29                                       ` Pavel Machek
2014-05-13 13:09                                       ` [PATCHv3] C_CAN: hwinit support for non-TI devices Pavel Machek
2014-05-13 13:36                                         ` Marc Kleine-Budde
2014-05-13 15:08                                           ` Pavel Machek
2014-05-13 15:18                                             ` Marc Kleine-Budde
2014-05-05 12:08                                 ` [PATCH 1/2] " Pavel Machek
2014-05-05 12:21                                   ` Marc Kleine-Budde
2014-05-05 12:22                                     ` Marc Kleine-Budde
2014-05-05 12:58                                     ` Pavel Machek
2014-05-05 13:00                                       ` Marc Kleine-Budde
2014-05-05 13:00                                     ` Pavel Machek

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