From: Alexander Gerasiov <gq@cs.msu.su>
To: Marc Kleine-Budde <mkl@pengutronix.de>
Cc: Nikita Edward Baruzdin <nebaruzdin@gmail.com>, linux-can@vger.kernel.org
Subject: Re: [PATCH v4] can: sja1000: Optimise register accesses
Date: Fri, 23 Sep 2016 14:06:30 +0300 [thread overview]
Message-ID: <20160923140630.37373192@brick.gerasiov.net> (raw)
In-Reply-To: <6f96b7d9-e8b6-28cc-b1d3-dbd04bf1a46d@pengutronix.de>
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Hello Marc,
On Mon, 19 Sep 2016 16:08:04 +0200
Marc Kleine-Budde <mkl@pengutronix.de> wrote:
> I talked to my PCI expert and we came to the conclusion that it's a
> very bad idea to acess the PCI bus with 32 bit on non aligned
> addresses.
>
> #define SJA1000_ID1 0x11
Agree, I've missed this. I'll update (write|read)_reg_rep() and send
updated patch next week.
--
Best regards,
Alexander Gerasiov
Contacts:
e-mail: gq@cs.msu.su Homepage: http://gerasiov.net Skype: gerasiov
PGP fingerprint: 04B5 9D90 DF7C C2AB CD49 BAEA CA87 E9E8 2AAC 33F1
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prev parent reply other threads:[~2016-09-23 11:13 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-08 13:51 [PATCH v4] can: sja1000: Optimise register accesses Nikita Edward Baruzdin
2016-09-19 14:08 ` Marc Kleine-Budde
2016-09-23 11:06 ` Alexander Gerasiov [this message]
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