Re: [RESEND PATCH 4/4] can: c_can: cache frames to operate as a true FIFO

Dario Binacchi
2021-08-05T20:12:23Z

Hi Marc,

> Il 04/08/2021 11:34 Marc Kleine-Budde <mkl@pengutronix.de> ha scritto:
>
>
> On 25.07.2021 18:11:50, Dario Binacchi wrote:
> > As reported by a comment in the c_can_start_xmit() this was not a FIFO.
> > C/D_CAN controller sends out the buffers prioritized so that the lowest
> > buffer number wins.
> >
> > What did c_can_start_xmit() do if head was less tail in the tx ring ? It
> > waited until all the frames queued in the FIFO was actually transmitted
> > by the controller before accepting a new CAN frame to transmit, even if
> > the FIFO was not full, to ensure that the messages were transmitted in
> > the order in which they were loaded.
> >
> > By storing the frames in the FIFO without requiring its transmission, we
> > will be able to use the full size of the FIFO even in cases such as the
> > one described above. The transmission interrupt will trigger their
> > transmission only when all the messages previously loaded but stored in
> > less priority positions of the buffers have been transmitted.
> >
> > Suggested-by: Gianluca Falavigna <gianluca.falavigna@inwind.it>
> > Signed-off-by: Dario Binacchi <dariobin@libero.it>
> >
> > ---
> >
> > drivers/net/can/c_can/c_can.h | 6 +++++
> > drivers/net/can/c_can/c_can_main.c | 42 +++++++++++++++++-------------
> > 2 files changed, 30 insertions(+), 18 deletions(-)
> >
> > diff --git a/drivers/net/can/c_can/c_can.h b/drivers/net/can/c_can/c_can.h
> > index 8fe7e2138620..fc499a70b797 100644
> > --- a/drivers/net/can/c_can/c_can.h
> > +++ b/drivers/net/can/c_can/c_can.h
> > +static inline u8 c_can_get_tx_free(const struct c_can_tx_ring *ring)
> > +{
> > + return ring->obj_num - (ring->head - ring->tail);
> > +}
> > +
> > #endif /* C_CAN_H */
> > diff --git a/drivers/net/can/c_can/c_can_main.c b/drivers/net/can/c_can/c_can_main.c
> > index 451ac9a9586a..4c061fef002c 100644
> > --- a/drivers/net/can/c_can/c_can_main.c
> > +++ b/drivers/net/can/c_can/c_can_main.c
> > @@ -427,20 +427,6 @@ static void c_can_setup_receive_object(struct net_device *dev, int iface,
> > c_can_object_put(dev, iface, obj, IF_COMM_RCV_SETUP);
> > }
> >
> > -static u8 c_can_get_tx_free(const struct c_can_tx_ring *ring)
> > -{
> > - u8 head = c_can_get_tx_head(ring);
> > - u8 tail = c_can_get_tx_tail(ring);
> > -
> > - /* This is not a FIFO. C/D_CAN sends out the buffers
> > - * prioritized. The lowest buffer number wins.
> > - */
> > - if (head < tail)
> > - return 0;
> > -
> > - return ring->obj_num - head;
> > -}
> > -
>
> Can you move that change into patch 3?

Patch 3 adds the ring transmission algorithm without compromising the
message transmission order. This is not a FIFO. C/D_CAN controller sends
out the buffers prioritized. The lowest buffer number wins, so moving the
change into patch 3 may not guarantee the transmission order.
In patch 3, however, I will move c_can_get_tx_free() from c_can_main.c to
c_can.h, so that in patch 4 it will be clearer how the routine has changed.

Thanks and regards,
Dario

>
> Marc
>
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