Linux CAN drivers development
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From: Marc Kleine-Budde <mkl@pengutronix.de>
To: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Cc: linux-can@vger.kernel.org,
	Matej Vasilevski <matej.vasilevski@seznam.cz>,
	Oliver Hartkopp <socketcan@hartkopp.net>,
	David Miller <davem@davemloft.net>,
	Carsten Emde <c.emde@osadl.org>,
	Marin Jerabek <martin.jerabek01@gmail.com>,
	Ondrej Ille <ondrej.ille@gmail.com>,
	Jiri Novak <jnovak@fel.cvut.cz>
Subject: Re: [PATCH v1 1/1] can: ctucanfd: Update CTU CAN FD IP core registers to match version 3.x.
Date: Mon, 18 Jul 2022 12:02:12 +0200	[thread overview]
Message-ID: <20220718100212.albs3uormsppr3wz@pengutronix.de> (raw)
In-Reply-To: <b426389bd3c6c4032b4bb6c234ccfe981e6d3860.1658136506.git.pisa@cmp.felk.cvut.cz>

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On 18.07.2022 11:55:18, Pavel Pisa wrote:
> The update is compatible/pure extension of 2.x IP core version
> 
>  - new option for 2, 4, or 8 Tx buffers option during synthesis.
>    The 2.x version has fixed 4 Tx buffers. 3.x version default
>    is 4 as well
>  - new REG_TX_COMMAND_TXT_BUFFER_COUNT provides synthesis
>    choice. When read as 0 assume 2.x core with fixed 4 Tx buffers.
>  - new REG_ERR_CAPT_TS_BITS field to provide most significant
>    active/implemented timestamp bit. For 2.x read as zero,
>    assume value 63 is such case for 64 bit counter.
>  - new REG_MODE_RXBAM bit which controls automatic advance
>    to next word after Rx FIFO register read. Bit is set
>    to 1 by default after the core reset (REG_MODE_RST)
>    and value 1 has to be preserver for the normal ctucanfd
                           preserved?
>    Linux driver operation. Even preceding driver version
>    resets core and then modifies only known/required MODE
>    register bits so backward and forward compatibility is
>    ensured.
> 
> See complete datasheet for time-triggered and other
> updated capabilities
> 
>   http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/Datasheet.pdf
> 
> The fields related to ongoing Ondrej Ille's work
> on fault tolerant version with parity protected buffers
> and FIFOs are not included for now. Their inclusion will
> be considered when design is settled and tested.
> 
> Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>

regards,
Marc

-- 
Pengutronix e.K.                 | Marc Kleine-Budde           |
Embedded Linux                   | https://www.pengutronix.de  |
Vertretung West/Dortmund         | Phone: +49-231-2826-924     |
Amtsgericht Hildesheim, HRA 2686 | Fax:   +49-5121-206917-5555 |

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  reply	other threads:[~2022-07-18 10:02 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-18  9:55 [PATCH v1 0/1] can: ctucanfd: Update CTU CAN FD IP core registers to match version 3.x Pavel Pisa
2022-07-18  9:55 ` [PATCH v1 1/1] " Pavel Pisa
2022-07-18 10:02   ` Marc Kleine-Budde [this message]
2022-07-18 10:00 ` [PATCH v1 0/1] " Marc Kleine-Budde
2022-07-18 10:26 ` [PATCH v2 1/1] " Pavel Pisa

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