From: Conor Dooley <conor@kernel.org>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Cc: linux-riscv@lists.infradead.org,
Conor Dooley <conor.dooley@microchip.com>,
Daire McNamara <daire.mcnamara@microchip.com>,
Wolfgang Grandegger <wg@grandegger.com>,
Marc Kleine-Budde <mkl@pengutronix.de>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-can@vger.kernel.org, netdev@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org
Subject: Re: [PATCH RESEND v1 1/7] dt-bindings: clock: mpfs: add more MSSPLL output definitions
Date: Fri, 8 Dec 2023 19:26:10 +0000 [thread overview]
Message-ID: <20231208-cauterize-hacker-f63dddf39af0@spud> (raw)
In-Reply-To: <CAJM55Z_ozf=MwOJCSM154L__TE1Gv7Ec=gM8LFJ31-_eX66OKA@mail.gmail.com>
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On Fri, Dec 08, 2023 at 09:40:00AM -0800, Emil Renner Berthing wrote:
> Conor Dooley wrote:
> > From: Conor Dooley <conor.dooley@microchip.com>
> >
> > There are 3 undocumented outputs of the MSSPLL that are used for the CAN
> > bus, "user crypto" module and eMMC. Add their clock IDs so that they can
> > be hooked up in DT.
> >
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > ---
> > include/dt-bindings/clock/microchip,mpfs-clock.h | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/include/dt-bindings/clock/microchip,mpfs-clock.h b/include/dt-bindings/clock/microchip,mpfs-clock.h
> > index 79775a5134ca..b52f19a2b480 100644
> > --- a/include/dt-bindings/clock/microchip,mpfs-clock.h
> > +++ b/include/dt-bindings/clock/microchip,mpfs-clock.h
> > @@ -44,6 +44,11 @@
> >
> > #define CLK_RTCREF 33
> > #define CLK_MSSPLL 34
> > +#define CLK_MSSPLL0 34
>
> You add this new CLK_MSSPLL0 macro with the same value as CLK_MSSPLL, but
> never seem to use it in this series. Did you mean to rename the CLK_MSSPLL
> instances CLK_MSSPLL0?
Yes, that was my intention.
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next prev parent reply other threads:[~2023-12-08 19:26 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-08 17:12 [PATCH RESEND v1 0/7] MPFS clock fixes required for correct CAN clock modeling Conor Dooley
2023-12-08 17:12 ` [PATCH RESEND v1 1/7] dt-bindings: clock: mpfs: add more MSSPLL output definitions Conor Dooley
2023-12-08 17:40 ` Emil Renner Berthing
2023-12-08 19:26 ` Conor Dooley [this message]
2023-12-09 7:58 ` Krzysztof Kozlowski
2023-12-08 17:12 ` [PATCH RESEND v1 2/7] dt-bindings: can: mpfs: add missing required clock Conor Dooley
2023-12-08 18:31 ` Rob Herring
2023-12-08 19:25 ` Conor Dooley
2023-12-08 21:42 ` Rob Herring
2023-12-12 20:49 ` Marc Kleine-Budde
2023-12-13 13:02 ` Conor Dooley
2023-12-14 11:31 ` Marc Kleine-Budde
2023-12-14 13:16 ` Conor Dooley
2023-12-14 13:20 ` Marc Kleine-Budde
2023-12-08 17:12 ` [PATCH RESEND v1 3/7] clk: microchip: mpfs: split MSSPLL in two Conor Dooley
2023-12-08 17:12 ` [PATCH RESEND v1 4/7] clk: microchip: mpfs: setup for using other mss pll outputs Conor Dooley
2023-12-08 17:12 ` [PATCH RESEND v1 5/7] clk: microchip: mpfs: add missing MSSPLL outputs Conor Dooley
2023-12-08 17:12 ` [PATCH RESEND v1 6/7] clk: microchip: mpfs: convert MSSPLL outputs to clk_divider Conor Dooley
2023-12-08 17:12 ` [PATCH RESEND v1 7/7] riscv: dts: microchip: add missing CAN bus clocks Conor Dooley
2023-12-08 17:17 ` [PATCH RESEND v1 0/7] MPFS clock fixes required for correct CAN clock modeling Marc Kleine-Budde
2023-12-08 17:21 ` Conor Dooley
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