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([2a02:810d:15c0:828:8a60:6b0f:105a:eefb]) by smtp.gmail.com with ESMTPSA id gj19-20020a170906e11300b0094a83007249sm2129846ejb.16.2023.04.14.01.01.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 14 Apr 2023 01:01:37 -0700 (PDT) Message-ID: <9ab56180-328e-1416-56cb-bbf71af0c26d@linaro.org> Date: Fri, 14 Apr 2023 10:01:36 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Subject: Re: [RFC PATCH 4/5] arm64: dts: ti: Enable multiple MCAN for AM62x in MCU MCAN overlay Content-Language: en-US To: Judith Mendez , Chandrasekar Ramakrishnan Cc: Nishanth Menon , Vignesh Raghavendra , Andrew Davis , Wolfgang Grandegger , Marc Kleine-Budde , Rob Herring , Krzysztof Kozlowski , linux-can@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, Schuyler Patton References: <20230413223051.24455-1-jm@ti.com> <20230413223051.24455-5-jm@ti.com> From: Krzysztof Kozlowski In-Reply-To: <20230413223051.24455-5-jm@ti.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-can@vger.kernel.org On 14/04/2023 00:30, Judith Mendez wrote: > Enable two MCAN in MCU domain. AM62x does not have on-board CAN > transcievers, so instead of changing the DTB permanently, add > MCU MCAN nodes and transceiver nodes to a MCU MCAN overlay. > > If there are no hardware interrupts rounted to the GIC interrupt > controller for MCAN IP, A53 Linux will not receive hardware > interrupts. If an hrtimer is used to generate software interrupts, > the two required interrupt attributes in the MCAN node do not have > to be included. > > Signed-off-by: Judith Mendez > --- > arch/arm64/boot/dts/ti/Makefile | 2 +- > .../boot/dts/ti/k3-am625-sk-mcan-mcu.dtso | 75 +++++++++++++++++++ > 2 files changed, 76 insertions(+), 1 deletion(-) > create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso > > diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile > index abe15e76b614..c76be3888e4d 100644 > --- a/arch/arm64/boot/dts/ti/Makefile > +++ b/arch/arm64/boot/dts/ti/Makefile > @@ -9,7 +9,7 @@ > # alphabetically. > > # Boards with AM62x SoC > -k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo > +k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo k3-am625-sk-mcan-mcu.dtbo > dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb > dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb > dtb-$(CONFIG_ARCH_K3) += k3-am625-sk-mcan.dtb > diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso > new file mode 100644 > index 000000000000..777705aea546 > --- /dev/null > +++ b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso > @@ -0,0 +1,75 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/** > + * DT overlay for MCAN in MCU domain on AM625 SK > + * > + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ > + */ > + > +/dts-v1/; > +/plugin/; > + > +#include > +#include > + > + > +&{/} { > + transceiver2: can-phy1 { > + compatible = "ti,tcan1042"; > + #phy-cells = <0>; > + max-bitrate = <5000000>; > + }; > + > + transceiver3: can-phy2 { > + compatible = "ti,tcan1042"; > + #phy-cells = <0>; > + max-bitrate = <5000000>; > + }; > +}; > + > +&mcu_pmx0 { > + mcu_mcan1_pins_default: mcu-mcan1-pins-default { > + pinctrl-single,pins = < > + AM62X_IOPAD(0x038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ > + AM62X_IOPAD(0x034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ > + >; > + }; > + > + mcu_mcan2_pins_default: mcu-mcan2-pins-default { > + pinctrl-single,pins = < > + AM62X_IOPAD(0x040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX */ > + AM62X_IOPAD(0x03C, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX */ > + >; > + }; > +}; > + > +&cbass_mcu { > + mcu_mcan1: can@4e00000 { > + compatible = "bosch,m_can"; > + reg = <0x00 0x4e00000 0x00 0x8000>, > + <0x00 0x4e08000 0x00 0x200>; > + reg-names = "message_ram", "m_can"; > + power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 188 6>, <&k3_clks 188 1>; > + clock-names = "hclk", "cclk"; > + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; > + pinctrl-names = "default"; > + pinctrl-0 = <&mcu_mcan1_pins_default>; > + phys = <&transceiver2>; > + status = "okay"; okay is by default. Why do you need it? Best regards, Krzysztof