Re: [PATCH v3 10/15] can: grcan: Add saving and restoring of CAN FD baud-rate registers

Arun Muthusamy
2026-01-28T08:35:07Z

On 1/23/26 15:00, Marc Kleine-Budde wrote:
> On 22.01.2026 13:10:33, Arun Muthusamy wrote:
>> From: Daniel Hellstrom <daniel@gaisler.com>
>>
>> While reset the GRCAN baud-rates are preserved, since GRCANFD has the
>> baud-rate in different registers we need to add saving of those
>> registers too.
>>
>> Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
>> Signed-off-by: Arun Muthusamy <arun.muthusamy@gaisler.com>
>> ---
>> drivers/net/can/grcan.c | 12 ++++++++++++
>> 1 file changed, 12 insertions(+)
>>
>> diff --git a/drivers/net/can/grcan.c b/drivers/net/can/grcan.c
>> index a2a5a5c868ff..0ee6e9bfbe7f 100644
>> --- a/drivers/net/can/grcan.c
>> +++ b/drivers/net/can/grcan.c
>> @@ -517,15 +517,27 @@ static void grcan_reset(struct net_device *dev)
>> struct grcan_priv *priv = netdev_priv(dev);
>> struct grcan_registers __iomem *regs = priv->regs;
>> u32 config = grcan_read_reg(&regs->conf);
>> + u32 nbtr, fdbtr;
>> +
>> + if (priv->hwcap->fd) {
>> + nbtr = grcan_read_reg(&regs->nbtr);
> Why do you save nbtr....

You’re right. nbtr is reprogrammed by set_bittiming() after reset, so saving/restoring nbtr is redundant.

>> + fdbtr = grcan_read_reg(&regs->fdbtr);
> Who writes fdbtr in the first place?

These configuration values are embedded into the CAN controller IP at SoC design time(cfg record).
From the driver's standpoint, saving/restoring fdbtr also redundant.

--
BR,

Arun Muthusamy
Software Engineer
Frontgrade Gaisler
T : +46 (0) 700 558 528
arun.muthusamy@gaisler.com

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