Re: [PATCH v3 07/15] can: grcan: add FD capability detection and nominal bit-timing

Marc Kleine-Budde
2026-01-23T13:52:29Z

[-- Attachment #1: Type: text/plain, Size: 8614 bytes --]

On 22.01.2026 13:10:30, Arun Muthusamy wrote:
> Add capability for the driver to detect CAN FD support
> and adjust accordingly. Introduce structures and functions
> for setting nominal bit-timing for standard CAN FD.
> The `grcan_hwcap` structure defines hardware capabilities like
> CAN FD support and baud-rate options. Additionally, improved
> device tree compatibility by updating the `of_device_id` table
> for better matching of GRCAN and GRCANFD devices. Also update
> Kconfig to mention GRCANFD support.
>
> Signed-off-by: Arun Muthusamy <arun.muthusamy@gaisler.com>
> Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
> ---
> drivers/net/can/Kconfig | 6 +-
> drivers/net/can/grcan.c | 142 +++++++++++++++++++++++++++++++++++-----
> 2 files changed, 130 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig
> index d43d56694667..96f61b40a898 100644
> --- a/drivers/net/can/Kconfig
> +++ b/drivers/net/can/Kconfig
> @@ -133,10 +133,12 @@ config CAN_FLEXCAN
> Say Y here if you want to support for Freescale FlexCAN.
>
> config CAN_GRCAN
> - tristate "Aeroflex Gaisler GRCAN and GRHCAN CAN devices"
> + tristate "Aeroflex Gaisler GRCAN(FD) and GRHCAN CAN devices"
> depends on OF && HAS_DMA && HAS_IOMEM
> help
> - Say Y here if you want to use Aeroflex Gaisler GRCAN or GRHCAN.
> + Say Y here if you want to use Aeroflex Gaisler GRCAN or GRCANFD
> + or GRHCAN.
> +
> Note that the driver supports little endian, even though little
> endian syntheses of the cores would need some modifications on
> the hardware level to work.
> diff --git a/drivers/net/can/grcan.c b/drivers/net/can/grcan.c
> index 5a63d0a0365f..5d09f61a153c 100644
> --- a/drivers/net/can/grcan.c
> +++ b/drivers/net/can/grcan.c
> @@ -33,6 +33,7 @@
> #include <linux/platform_device.h>
> #include <linux/spinlock.h>
> #include <linux/of.h>
> +#include <linux/of_device.h>
> #include <linux/of_irq.h>
> #include <linux/clk.h>
> #include <linux/dma-mapping.h>
> @@ -51,7 +52,11 @@ struct grcan_registers {
> u32 __reserved1[GRCAN_RESERVE_SIZE(0x08, 0x18)];
> u32 smask; /* 0x18 - CanMASK */
> u32 scode; /* 0x1c - CanCODE */
> - u32 __reserved2[GRCAN_RESERVE_SIZE(0x1c, 0x100)];
> + u32 __reserved2[GRCAN_RESERVE_SIZE(0x1c, 0x40)];
> + u32 nbtr; /* 0x40 */
> + u32 fdbtr; /* 0x44 */
> + u32 tdelay; /* 0x48 */
> + u32 __reserved2_[GRCAN_RESERVE_SIZE(0x48, 0x100)];
> u32 pimsr; /* 0x100 */
> u32 pimr; /* 0x104 */
> u32 pisr; /* 0x108 */
> @@ -203,6 +208,39 @@ struct grcan_registers {
> #error "Invalid default buffer size"
> #endif
>
> +#define GRCANFD_NBTR_SCALER GENMASK(23, 16)
> +#define GRCANFD_NBTR_PS1 GENMASK(17, 10)
> +#define GRCANFD_NBTR_PS2 GENMASK(9, 5)
> +#define GRCANFD_NBTR_SJW GENMASK(4, 0)
> +#define GRCANFD_NBTR_TIMING \
> + (GRCANFD_NBTR_SCALER | GRCANFD_NBTR_PS1 | GRCANFD_NBTR_PS2 | \
> + GRCANFD_NBTR_SJW)
> +
> +#define GRCANFD_FDBTR_SCALER 0x00ff0000
> +#define GRCANFD_FDBTR_PS1 0x00003c00
> +#define GRCANFD_FDBTR_PS2 0x000001e0
> +#define GRCANFD_FDBTR_SJW 0x0000000f
> +#define GRCANFD_FDBTR_TIMING \
> + (GRCANFD_FDBTR_SCALER | GRCANFD_FDBTR_PS1 | GRCANFD_FDBTR_PS2 | \
> + GRCANFD_FDBTR_SJW)
> +
> +#define GRCANFD_FDBTR_SCALER_BIT 16
> +#define GRCANFD_FDBTR_PS1_BIT 10
> +#define GRCANFD_FDBTR_PS2_BIT 5
> +#define GRCANFD_FDBTR_SJW_BIT 0
> +
> +/* Hardware capabilities */
> +struct grcan_hwcap {
> + /* CAN-FD capable, indicates GRCANFD IP.
> + * The GRCANFD has different baud-rate registers and extended DMA
> + * format to also describe FD-frames.
> + */
> + const struct can_bittiming_const *bt_const;
> + int (*set_bittiming)(struct net_device *dev);
> + bool txbug_possible;
> + bool fd;
> +};
> +
> struct grcan_dma_buffer {
> size_t size;
> void *buf;
> @@ -245,6 +283,7 @@ struct grcan_priv {
> struct napi_struct napi;
>
> struct grcan_registers __iomem *regs; /* ioremap'ed registers */
> + const struct grcan_hwcap *hwcap;
> struct grcan_device_config config;
> struct grcan_dma dma;
>
> @@ -295,6 +334,7 @@ struct grcan_priv {
> */
> bool resetting;
> bool closing;
> +

Please remove this change

> };
>
> /* Wait time for a short wait for ongoing to clear */
> @@ -393,6 +433,19 @@ static const struct can_bittiming_const grcan_bittiming_const = {
> .brp_inc = 1,
> };
>
> +/* GRCANFD nominal boundaries for baud-rate parameters */
> +static const struct can_bittiming_const grcanfd_bittiming_const = {
> + .name = DRV_NAME,
> + .tseg1_min = 2,
> + .tseg1_max = 63,
> + .tseg2_min = 2,
> + .tseg2_max = 16,
> + .sjw_max = 16,
> + .brp_min = 1,
> + .brp_max = 256,
> + .brp_inc = 1,
> +};
> +
> static int grcan_set_bittiming(struct net_device *dev)
> {
> struct grcan_priv *priv = netdev_priv(dev);
> @@ -421,6 +474,32 @@ static int grcan_set_bittiming(struct net_device *dev)
> return 0;
> }
>
> +static int grcanfd_set_bittiming(struct net_device *dev)
> +{
> + struct grcan_priv *priv = netdev_priv(dev);
> + struct grcan_registers __iomem *regs;
> + int sjw, ps1, ps2, scaler;
> + struct can_bittiming *bt;
> + u32 timing = 0;
> +
> + regs = priv->regs;
> + bt = &priv->can.bittiming;
> +
> + sjw = bt->sjw;
> + ps1 = (bt->prop_seg + bt->phase_seg1);
> + ps2 = bt->phase_seg2;
> + scaler = bt->brp - 1;
> +
> + timing |= FIELD_PREP(GRCANFD_NBTR_SJW, sjw);
> + timing |= FIELD_PREP(GRCANFD_NBTR_PS1, ps1);
> + timing |= FIELD_PREP(GRCANFD_NBTR_PS2, ps2);
> + timing |= FIELD_PREP(GRCANFD_NBTR_SCALER, scaler);
> + netdev_info(dev, "setting timing=0x%x\n", timing);

make it debug or remove

> + grcan_write_bits(&regs->nbtr, timing, GRCANFD_NBTR_TIMING);
> +
> + return 0;
> +}
> +
> static int grcan_get_berr_counter(const struct net_device *dev,
> struct can_berr_counter *bec)
> {
> @@ -1545,7 +1624,8 @@ static const struct ethtool_ops grcan_ethtool_ops = {
>
> static int grcan_setup_netdev(struct platform_device *ofdev,
> void __iomem *base,
> - int irq, u32 ambafreq, bool txbug)
> + int irq, u32 ambafreq, bool txbug,
> + const struct grcan_hwcap *hwcap)
> {
> struct net_device *dev;
> struct grcan_priv *priv;
> @@ -1568,14 +1648,14 @@ static int grcan_setup_netdev(struct platform_device *ofdev,
> priv->dev = dev;
> priv->ofdev_dev = &ofdev->dev;
> priv->regs = base;
> - priv->can.bittiming_const = &grcan_bittiming_const;
> - priv->can.do_set_bittiming = grcan_set_bittiming;
> + priv->can.bittiming_const = hwcap->bt_const;
> priv->can.do_set_mode = grcan_set_mode;
> priv->can.do_get_berr_counter = grcan_get_berr_counter;
> priv->can.clock.freq = ambafreq;
> priv->can.ctrlmode_supported =
> CAN_CTRLMODE_LISTENONLY | CAN_CTRLMODE_ONE_SHOT;
> priv->need_txbug_workaround = txbug;
> + priv->hwcap = hwcap;
>
> /* Discover if triple sampling is supported by hardware */
> regs = priv->regs;
> @@ -1620,22 +1700,33 @@ static int grcan_probe(struct platform_device *ofdev)
> {
> struct device_node *np = ofdev->dev.of_node;
> struct device_node *sysid_parent;
> + const struct grcan_hwcap *hwcap;
> struct clk *clk;
> u32 sysid, ambafreq;
> int irq, err;
> void __iomem *base;
> bool txbug = true;
>
> + hwcap = device_get_match_data(&ofdev->dev);
> + if (!hwcap) {
> + dev_err(&ofdev->dev, "Platform data not provided!\n");
> + return -ENODEV;
> + }
> +

All entries in grcan_match have a corresponding data member, so I think
you can remove this check.

[...]

> static const struct of_device_id grcan_match[] = {
> - {.name = "GAISLER_GRCAN"},
> - {.name = "01_03d"},
> - {.name = "GAISLER_GRHCAN"},
> - {.name = "01_034"},
> + {.name = "GAISLER_GRCAN", .data = &grcan_hwcap},
> + {.name = "01_03d", .data = &grcan_hwcap},
> + {.name = "GAISLER_GRHCAN", .data = &grcan_hwcap},
> + {.name = "01_034", .data = &grcan_hwcap},
> + {.compatible = "gaisler,grcan", .data = &grcan_hwcap},
> + /* GRCANFD */
> + {.compatible = "gaisler,grcanfd", .data = &grcanfd_hwcap},
> + {.name = "GAISLER_GRCANFD", .data = &grcanfd_hwcap},
> + {.name = "01_0b5", .data = &grcanfd_hwcap},
> {},
> };
>

Marc

--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
Vertretung Nürnberg | Phone: +49-5121-206917-129 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]