Re: [GIT PULL] ARM: microchip: clk for 6.18 #1

Nicolas Ferre
2025-09-16T13:19:35Z

On 16/09/2025 at 10:05, nicolas.ferre@microchip.com wrote:
> From: Nicolas Ferre <nicolas.ferre@microchip.com>
>
> Dear clock maintainers,
>
> Here are the first clk changes for 6.18.
> I don't think they have conflict with changes for the deprecated round_rate()
> to determine_rate() topic.
> They are in linux-next for a couple of days.

But... this series depends on this patch:
https://lore.kernel.org/r/20250827145427.46819-4-nicolas.ferre@microchip.com

Which will be part of a pull-request to-be-sent soon to arm-soc (which
is part of linux-next, so the build error doesn't appear there).

Once the pull-request is done, do you prefer that I do an immutable
branch between CLK and ARM, that I queue this at91 PM patch into the clk
pull-request or that everything goes through arm-soc?

Thanks to the kbuild test bot.
Regards,
Nicolas

> Please pull. Thanks, best regards,
> Nicolas
>
> The following changes since commit 8f5ae30d69d7543eee0d70083daf4de8fe15d585:
>
> Linux 6.17-rc1 (2025-08-10 19:41:16 +0300)
>
> are available in the Git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux.git tags/clk-microchip-6.18
>
> for you to fetch changes up to e3130c2a9a0c8e549e044e659be6f762a1b1f725:
>
> ARM: at91: remove default values for PMC_PLL_ACR (2025-09-15 16:24:25 +0200)
>
> ----------------------------------------------------------------
> Microchip clock updates for v6.18
>
> This update includes:
> - add one clock for sam9x75
> - new meaning for MCR register field in clk-master
> - use force-write to PLL update register to ensure
> reliable programming sequence
> - update Analog Control Register (ACR) management to accommodate
> differences across SoCs
>
> ----------------------------------------------------------------
> Balamanikandan Gunasundar (1):
> clk: at91: sam9x7: Add peripheral clock id for pmecc
>
> Cristian Birsan (2):
> clk: at91: add ACR in all PLL settings
> ARM: at91: remove default values for PMC_PLL_ACR
>
> Nicolas Ferre (1):
> clk: at91: clk-sam9x60-pll: force write to PLL_UPDT register
>
> Ryan Wanner (1):
> clk: at91: clk-master: Add check for divide by 3
>
> drivers/clk/at91/clk-master.c | 3 ++
> drivers/clk/at91/clk-sam9x60-pll.c | 82 +++++++++++++++++------------------
> drivers/clk/at91/pmc.h | 1 +
> drivers/clk/at91/sam9x60.c | 2 +
> drivers/clk/at91/sam9x7.c | 6 +++
> drivers/clk/at91/sama7d65.c | 4 ++
> drivers/clk/at91/sama7g5.c | 2 +
> include/linux/clk/at91_pmc.h | 2 -
> 8 files changed, 59 insertions(+), 43 deletions(-)
>