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Wed, 20 Mar 2024 07:59:53 -0700 (PDT) Received: from [100.64.0.1] ([136.226.86.189]) by smtp.gmail.com with ESMTPSA id a9-20020a92d109000000b00366895ef367sm3491581ilb.38.2024.03.20.07.59.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 20 Mar 2024 07:59:52 -0700 (PDT) Message-ID: <0a807505-221c-4aa9-ac63-c442417f3030@sifive.com> Date: Wed, 20 Mar 2024 09:59:51 -0500 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] clk: starfive: jh7100: Use clk_hw for external input clocks Content-Language: en-US To: Geert Uytterhoeven Cc: linux-clk@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Emil Renner Berthing , Hal Feng , Michael Turquette , Stephen Boyd , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Krzysztof Kozlowski , Andy Shevchenko References: <47bddec7-953d-4ea4-84f1-b0dcf0641baa@sifive.com> From: Samuel Holland In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hi Geert, On 2024-03-20 9:28 AM, Geert Uytterhoeven wrote: > On Wed, Mar 20, 2024 at 2:31 PM Samuel Holland > wrote: >> On 2024-03-20 6:24 AM, Geert Uytterhoeven wrote: >>> The Starfive JH7100 clock driver does not use the DT "clocks" property >>> to find the external main input clock, but instead relies on the name of >>> the actual clock provider ("osc_sys"). This is fragile, and caused >>> breakage when sanitizing clock node names in DTS. >>> >>> Fix this by obtaining the external main input clock using >>> devm_clk_get(), and passing the returned clk_hw object to >>> devm_clk_hw_register_fixed_factor_parent_hw(). >>> >>> While name-based look-up of the other external input clocks works as-is, >>> convert them to a similar clk_hw-based scheme to increase uniformity, >>> and to decrease the number of name-based look-ups. >>> >>> Fixes: f03606470886 ("riscv: dts: starfive: replace underscores in node names") >>> Fixes: 4210be668a09ee20 ("clk: starfive: Add JH7100 clock generator driver") >>> Signed-off-by: Geert Uytterhoeven > > >>> --- a/drivers/clk/starfive/clk-starfive-jh7100.c >>> +++ b/drivers/clk/starfive/clk-starfive-jh7100.c > >>> @@ -284,8 +293,11 @@ static struct clk_hw *jh7100_clk_get(struct of_phandle_args *clkspec, void *data >>> >>> static int __init clk_starfive_jh7100_probe(struct platform_device *pdev) >>> { >>> + static const char *jh7100_ext_clk[EXT_NUM_CLKS] = >>> + { "osc_sys", "osc_aud", "gmac_rmii_ref", "gmac_gr_mii_rxclk" }; >> >> This should be __initconst. Otherwise: > > With > > - static const char *jh7100_ext_clk[EXT_NUM_CLKS] = > + static const char *jh7100_ext_clk[EXT_NUM_CLKS] __initconst = > > I get: > > drivers/clk/starfive/clk-starfive-jh7100.c: In function > ‘clk_starfive_jh7100_probe’: > drivers/clk/starfive/clk-starfive-jh7100.c:35:37: error: > ‘jh7100_clk_data’ causes a section type conflict with ‘jh7100_ext_clk’ > 35 | static const struct jh71x0_clk_data jh7100_clk_data[] > __initconst = { > | ^~~~~~~~~~~~~~~ > drivers/clk/starfive/clk-starfive-jh7100.c:296:28: note: > ‘jh7100_ext_clk’ was declared here > 296 | static const char *jh7100_ext_clk[EXT_NUM_CLKS] > __initconst = > | ^~~~~~~~~~~~~~ > > which is a bit strange... > What am I missing? I think you need to add another "const" covering the array itself: static const char *const jh7100_ext_clk[EXT_NUM_CLKS] __initconst = Regards, Samuel