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From: Carlo Caione <carlo@caione.org>
To: robh+dt@kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, mturquette@baylibre.com,
	linux-clk@vger.kernel.org, linux@arm.linux.org.uk,
	linux-meson@googlegroups.com, drake@endlessm.com,
	jerry.cao@amlogic.com, victor.wan@amlogic.com,
	pawel.moll@arm.com, arnd@arndb.de
Cc: Carlo Caione <carlo@endlessm.com>
Subject: [PATCH 7/7] ARM: DTS: meson8b: Add SMP related nodes
Date: Tue, 17 Nov 2015 15:56:42 +0100	[thread overview]
Message-ID: <1447772202-12418-8-git-send-email-carlo@caione.org> (raw)
In-Reply-To: <1447772202-12418-1-git-send-email-carlo@caione.org>

From: Carlo Caione <carlo@endlessm.com>

Add nodes for: SCU, PMU and SRAM. Set also the enable-method for SMP
bringup.

Signed-off-by: Carlo Caione <carlo@endlessm.com>
---
 arch/arm/boot/dts/meson8b.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index 977d55f..0477a81 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -51,9 +51,20 @@
 / {
 	interrupt-parent = <&gic>;
 
+	scu@c4300000 {
+		compatible = "arm,cortex-a5-scu";
+		reg = <0xc4300000 0x100>;
+	};
+
+	pmu@c81000e4 {
+		compatible = "amlogic,meson8b-pmu", "syscon";
+		reg = <0xc81000e0 0x18>;
+	};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "amlogic,meson8b-smp";
 
 		cpu@200 {
 			device_type = "cpu";
@@ -88,6 +99,19 @@
 		};
 	};
 
+	sram: sram@d9000000 {
+		compatible = "mmio-sram";
+		reg = <0xd9000000 0x20000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0xd9000000 0x20000>;
+
+		smp-sram@1ff80 {
+			compatible = "amlogic,meson8b-smp-sram";
+			reg = <0x1ff80 0x8>;
+		};
+	};
+
 	soc {
 		compatible = "simple-bus";
 		#address-cells = <1>;
-- 
2.5.0

      parent reply	other threads:[~2015-11-17 14:56 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-17 14:56 [PATCH 0/7] Add basic SMP support for Amlogic Meson8b Carlo Caione
2015-11-17 14:56 ` [PATCH 1/7] ARM: DTS: meson8b: Extend L2 cache controller node Carlo Caione
2015-11-17 14:56 ` [PATCH 2/7] Documentation: bindings: Define CPU reset controller Carlo Caione
2015-11-17 19:32   ` Rob Herring
2015-11-17 14:56 ` [PATCH 3/7] clk: meson8b: Add reset controller for CPU cores Carlo Caione
2015-11-17 14:56 ` [PATCH 4/7] ARM: DTS: meson8b: Enable reset controller Carlo Caione
2015-11-17 14:56 ` [PATCH 5/7] Documentation: bindings: Add SMP related documentation Carlo Caione
2015-11-17 19:30   ` Rob Herring
2015-11-17 14:56 ` [PATCH 6/7] ARM: meson8b: Add SMP bringup code Carlo Caione
2015-11-17 14:56 ` Carlo Caione [this message]

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