From: Chen-Yu Tsai <wens@csie.org>
To: Maxime Ripard <maxime.ripard@free-electrons.com>,
Emilio Lopez <emilio@elopez.com.ar>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>
Cc: Chen-Yu Tsai <wens@csie.org>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com
Subject: [PATCH 3/6] ARM: dts: sun4i: Add DRAM gates
Date: Sat, 5 Dec 2015 17:00:06 +0800 [thread overview]
Message-ID: <1449306009-2627-4-git-send-email-wens@csie.org> (raw)
In-Reply-To: <1449306009-2627-1-git-send-email-wens@csie.org>
The DRAM gates controls direct memory access for some peripherals.
These peripherals include the display pipeline, so add the required
gates to the simplefb nodes as well.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/boot/dts/sun4i-a10.dtsi | 36 ++++++++++++++++++++++++++++++++----
1 file changed, 32 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index aa90f319309b..849d0242ece8 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -66,7 +66,7 @@
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-hdmi";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
- <&ahb_gates 44>;
+ <&ahb_gates 44>, <&dram_gates 26>;
status = "disabled";
};
@@ -75,7 +75,8 @@
"simple-framebuffer";
allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
- <&ahb_gates 44>, <&ahb_gates 46>;
+ <&ahb_gates 44>, <&ahb_gates 46>,
+ <&dram_gates 25>, <&dram_gates 26>;
status = "disabled";
};
@@ -84,7 +85,8 @@
"simple-framebuffer";
allwinner,pipeline = "de_fe0-de_be0-lcd0";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>,
- <&ahb_gates 46>;
+ <&ahb_gates 46>, <&dram_gates 25>,
+ <&dram_gates 26>;
status = "disabled";
};
@@ -93,7 +95,8 @@
"simple-framebuffer";
allwinner,pipeline = "de_fe0-de_be0-lcd0-tve0";
clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
- <&ahb_gates 44>, <&ahb_gates 46>;
+ <&ahb_gates 44>, <&ahb_gates 46>,
+ <&dram_gates 25>, <&dram_gates 26>;
status = "disabled";
};
};
@@ -492,6 +495,31 @@
clock-output-names = "spi3";
};
+ dram_gates: clk@01c20100 {
+ #clock-cells = <1>;
+ compatible = "allwinner,sun4i-a10-dram-gates-clk";
+ reg = <0x01c20100 0x4>;
+ clocks = <&pll5 0>;
+ clock-indices = <0>,
+ <1>, <2>,
+ <3>,
+ <4>,
+ <5>, <6>,
+ <15>,
+ <24>, <25>,
+ <26>, <27>,
+ <28>, <29>;
+ clock-output-names = "dram_ve",
+ "dram_csi0", "dram_csi1",
+ "dram_ts",
+ "dram_tvd",
+ "dram_tve0", "dram_tve1",
+ "dram_output",
+ "dram_de_fe1", "dram_de_fe0",
+ "dram_de_be0", "dram_de_be1",
+ "dram_de_mp", "dram_ace";
+ };
+
codec_clk: clk@01c20140 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-codec-clk";
--
2.6.2
next prev parent reply other threads:[~2015-12-05 9:00 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-05 9:00 [PATCH 0/6] ARM: sunxi: Add support for A10/A20 Video Engine clocks Chen-Yu Tsai
2015-12-05 9:00 ` [PATCH 1/6] clk: sunxi: Add DRAM gates support for sun4i-a10 Chen-Yu Tsai
2015-12-07 14:15 ` Rob Herring
2015-12-05 9:00 ` [PATCH 2/6] clk: sunxi: Add VE (Video Engine) module clock driver for sun[457]i Chen-Yu Tsai
2015-12-07 14:15 ` Rob Herring
2015-12-05 9:00 ` Chen-Yu Tsai [this message]
2015-12-05 9:00 ` [PATCH 4/6] ARM: dts: sun4i: Add VE (Video Engine) module clock node Chen-Yu Tsai
2015-12-05 9:00 ` [PATCH 5/6] ARM: dts: sun7i: Add DRAM gates Chen-Yu Tsai
2015-12-05 9:00 ` [PATCH 6/6] ARM: dts: sun7i: Add VE (Video Engine) module clock node Chen-Yu Tsai
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