From: Rajendra Nayak <rnayak@codeaurora.org>
To: sboyd@codeaurora.org, mturquette@baylibre.com
Cc: linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, tdas@codeaurora.org,
Rajendra Nayak <rnayak@codeaurora.org>
Subject: [PATCH v3 08/11] clk: qcom: mmcc-8996: Add capability flags for some alpha PLLs
Date: Thu, 29 Sep 2016 14:05:49 +0530 [thread overview]
Message-ID: <1475138152-859-9-git-send-email-rnayak@codeaurora.org> (raw)
In-Reply-To: <1475138152-859-1-git-send-email-rnayak@codeaurora.org>
Flag alpha PLLs which support fsmmode, dynamic update and the ones
with latched input interface.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
drivers/clk/qcom/mmcc-msm8996.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/clk/qcom/mmcc-msm8996.c b/drivers/clk/qcom/mmcc-msm8996.c
index 847dd9d..f2f40ce 100644
--- a/drivers/clk/qcom/mmcc-msm8996.c
+++ b/drivers/clk/qcom/mmcc-msm8996.c
@@ -269,6 +269,7 @@ static struct clk_alpha_pll mmpll0_early = {
.offset = 0x0,
.vco_table = mmpll_p_vco,
.num_vco = ARRAY_SIZE(mmpll_p_vco),
+ .flags = SUPPORTS_FSM_MODE,
.clkr = {
.enable_reg = 0x100,
.enable_mask = BIT(0),
@@ -297,6 +298,7 @@ static struct clk_alpha_pll mmpll1_early = {
.offset = 0x30,
.vco_table = mmpll_p_vco,
.num_vco = ARRAY_SIZE(mmpll_p_vco),
+ .flags = SUPPORTS_FSM_MODE,
.clkr = {
.enable_reg = 0x100,
.enable_mask = BIT(1),
@@ -445,6 +447,8 @@ static struct clk_alpha_pll mmpll9_early = {
.offset = 0x4200,
.vco_table = mmpll_t_vco,
.num_vco = ARRAY_SIZE(mmpll_t_vco),
+ .flags = SUPPORTS_DYNAMIC_UPDATE | SUPPORTS_LATCHED_INPUT,
+ .latch_ack_bit = 29,
.clkr.hw.init = &(struct clk_init_data){
.name = "mmpll9_early",
.parent_names = (const char *[]){ "xo" },
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2016-09-29 8:35 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-29 8:35 [PATCH v3 00/11] clk: qcom: PLL updates Rajendra Nayak
2016-09-29 8:35 ` [PATCH v3 01/11] clk: qcom: Add support for alpha pll hwfsm ops Rajendra Nayak
2016-11-02 21:51 ` Stephen Boyd
2016-09-29 8:35 ` [PATCH v3 02/11] clk: qcom: Add support to initialize alpha plls Rajendra Nayak
2016-11-02 21:51 ` Stephen Boyd
2016-09-29 8:35 ` [PATCH v3 03/11] clk: qcom: handle alpha PLLs with 16bit alpha val registers Rajendra Nayak
2016-11-02 21:51 ` Stephen Boyd
2016-09-29 8:35 ` [PATCH v3 04/11] clk: qcom: Enable FSM mode for votable alpha PLLs Rajendra Nayak
2016-11-02 21:51 ` Stephen Boyd
2016-09-29 8:35 ` [PATCH v3 05/11] clk: qcom: Add .is_enabled ops for clk-alpha-pll Rajendra Nayak
2016-11-02 21:51 ` Stephen Boyd
2016-09-29 8:35 ` [PATCH v3 06/11] clk: qcom: Fix .set_rate to handle alpha PLLs w/wo dynamic update Rajendra Nayak
2016-11-02 21:54 ` Stephen Boyd
2016-11-03 8:28 ` Rajendra Nayak
2016-11-03 19:48 ` Stephen Boyd
2016-09-29 8:35 ` [PATCH v3 07/11] clk: qcom: support dynamic update using latched interface Rajendra Nayak
2016-09-29 8:35 ` Rajendra Nayak [this message]
2016-09-29 8:35 ` [PATCH v3 09/11] clk: qcom: Add support for table based lookups in clk-regmap-mux Rajendra Nayak
2016-09-29 8:35 ` [PATCH v3 10/11] clk: Add clk_hw_get_clk() helper API to be used by clk providers Rajendra Nayak
2016-11-02 22:22 ` Stephen Boyd
2016-11-03 8:34 ` Rajendra Nayak
2016-11-03 19:46 ` Stephen Boyd
2016-09-29 8:35 ` [RFC v3 11/11] clk: qcom: Add basic CPU clock driver for msm8996 Rajendra Nayak
2016-11-02 22:17 ` Stephen Boyd
2016-11-03 8:33 ` Rajendra Nayak
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