From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: Message-ID: <1491145750.3480.3.camel@baylibre.com> Subject: Re: [PATCH 2/2] clk: meson: mpll: use 64bit math in rate_from_params From: Jerome Brunet To: Martin Blumenstingl , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, khilman@baylibre.com, carlo@caione.org, sboyd@codeaurora.org, mturquette@baylibre.com, narmstrong@baylibre.com Date: Sun, 02 Apr 2017 17:09:10 +0200 In-Reply-To: <20170401130225.8811-3-martin.blumenstingl@googlemail.com> References: <20170401130225.8811-1-martin.blumenstingl@googlemail.com> <20170401130225.8811-3-martin.blumenstingl@googlemail.com> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 List-ID: On Sat, 2017-04-01 at 15:02 +0200, Martin Blumenstingl wrote: > On Meson8b the MPLL parent clock (fixed_pll) has a rate of 2550MHz. > Multiplying this with SDM_DEN results in a value greater than 32bits. > This is not a problem on the 64bit Meson GX SoCs, but it may result in > undefined behavior on the older 32bit Meson8b SoC. > > While rate_from_params was only introduced recently to make the math > reusable from _round_rate and _recalc_rate the original bug exists much > longer. Again, thanks for testing and fixing this Martin ! > > Fixes: 1c50da4f27 ("clk: meson: add mpll support") > Signed-off-by: Martin Blumenstingl > --- >  drivers/clk/meson/clk-mpll.c | 3 ++- >  1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/meson/clk-mpll.c b/drivers/clk/meson/clk-mpll.c > index 551aa2a5b291..4306ad833a4f 100644 > --- a/drivers/clk/meson/clk-mpll.c > +++ b/drivers/clk/meson/clk-mpll.c > @@ -62,6 +62,7 @@ >   */ >   >  #include > +#include >  #include "clkc.h" >   >  #define SDM_DEN 16384 > @@ -81,7 +82,7 @@ static unsigned long rate_from_params(unsigned long > parent_rate, >   if (divisor == 0) >   return 0; >   else > - return (parent_rate * SDM_DEN) / divisor; > + return mul_u64_u32_div(parent_rate, SDM_DEN, divisor); Just casting parent_rate to u64 should be enough, don't you think ? Actually, I was thinking of copying a pattern that is used a lot in CCF and use DIV_ROUND_UP_ULL((u64)foo, bar). See clk-divider.c. Would this be ok with you ? >  } >   >  static void params_from_rate(unsigned long requested_rate,