[PATCH v2] clk: x86: Do not gate clocks enabled by the firmware

[PATCH v2] clk: x86: Do not gate clocks enabled by the firmware

[Carlo Caione]

From: Carlo Caione <carlo@endlessm.com>

Read the enable register to determine if the clock is already in use by
the firmware. In this case avoid gating the clock.

Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
---
 drivers/clk/x86/clk-pmc-atom.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/clk/x86/clk-pmc-atom.c b/drivers/clk/x86/clk-pmc-atom.c
index 2b60577703ef..3c73d2e564ca 100644
--- a/drivers/clk/x86/clk-pmc-atom.c
+++ b/drivers/clk/x86/clk-pmc-atom.c
@@ -185,6 +185,13 @@ static struct clk_plt *plt_clk_register(struct platform_device *pdev, int id,
 	pclk->reg = base + PMC_CLK_CTL_OFFSET + id * PMC_CLK_CTL_SIZE;
 	spin_lock_init(&pclk->lock);
 
+	/*
+	 * If the clock was already enabled by the firmware mark is a critical
+	 * to avoid it being gated by the clock framework if no driver owns it
+	 */
+	if (plt_clk_is_enabled(&pclk->hw))
+		init.flags |= CLK_IS_CRITICAL;
+
 	ret = devm_clk_hw_register(&pdev->dev, &pclk->hw);
 	if (ret) {
 		pclk = ERR_PTR(ret);
-- 
2.13.2

Re: [PATCH v2] clk: x86: Do not gate clocks enabled by the firmware

[Andy Shevchenko]

On Thu, 2017-07-13 at 11:42 +0200, Carlo Caione wrote:
> From: Carlo Caione <carlo@endlessm.com>
> 
> Read the enable register to determine if the clock is already in use
> by
> the firmware. In this case avoid gating the clock.
> 

Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

I suppose it should go via clock tree.

> Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> Signed-off-by: Carlo Caione <carlo@endlessm.com>
> ---
>  drivers/clk/x86/clk-pmc-atom.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/clk/x86/clk-pmc-atom.c b/drivers/clk/x86/clk-pmc-
> atom.c
> index 2b60577703ef..3c73d2e564ca 100644
> --- a/drivers/clk/x86/clk-pmc-atom.c
> +++ b/drivers/clk/x86/clk-pmc-atom.c
> @@ -185,6 +185,13 @@ static struct clk_plt *plt_clk_register(struct
> platform_device *pdev, int id,
>  	pclk->reg = base + PMC_CLK_CTL_OFFSET + id *
> PMC_CLK_CTL_SIZE;
>  	spin_lock_init(&pclk->lock);
>  
> +	/*
> +	 * If the clock was already enabled by the firmware mark is a
> critical
> +	 * to avoid it being gated by the clock framework if no
> driver owns it
> +	 */
> +	if (plt_clk_is_enabled(&pclk->hw))
> +		init.flags |= CLK_IS_CRITICAL;
> +
>  	ret = devm_clk_hw_register(&pdev->dev, &pclk->hw);
>  	if (ret) {
>  		pclk = ERR_PTR(ret);

-- 
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy

Re: [PATCH v2] clk: x86: Do not gate clocks enabled by the firmware

[Darren Hart]

On Thu, Jul 13, 2017 at 01:06:14PM +0300, Andy Shevchenko wrote:
> On Thu, 2017-07-13 at 11:42 +0200, Carlo Caione wrote:
> > From: Carlo Caione <carlo@endlessm.com>
> > 
> > Read the enable register to determine if the clock is already in use
> > by
> > the firmware. In this case avoid gating the clock.
> > 
> 
> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> 
> I suppose it should go via clock tree.
> 
> > Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> > Signed-off-by: Carlo Caione <carlo@endlessm.com>
> > ---
> >  drivers/clk/x86/clk-pmc-atom.c | 7 +++++++
> >  1 file changed, 7 insertions(+)
> > 
> > diff --git a/drivers/clk/x86/clk-pmc-atom.c b/drivers/clk/x86/clk-pmc-
> > atom.c
> > index 2b60577703ef..3c73d2e564ca 100644
> > --- a/drivers/clk/x86/clk-pmc-atom.c
> > +++ b/drivers/clk/x86/clk-pmc-atom.c
> > @@ -185,6 +185,13 @@ static struct clk_plt *plt_clk_register(struct
> > platform_device *pdev, int id,
> >  	pclk->reg = base + PMC_CLK_CTL_OFFSET + id *
> > PMC_CLK_CTL_SIZE;
> >  	spin_lock_init(&pclk->lock);
> >  
> > +	/*
> > +	 * If the clock was already enabled by the firmware mark is a
> > critical

Nit... I think this should read... "mark it as critical" ?

> > +	 * to avoid it being gated by the clock framework if no
> > driver owns it

owns it.

Acked-by: Darren Hart (VMware) <dvhart@infradead.org>

-- 
Darren Hart
VMware Open Source Technology Center

Re: [PATCH v2] clk: x86: Do not gate clocks enabled by the firmware

[Carlo Caione]

On Thu, Jul 13, 2017 at 5:54 PM, Darren Hart <dvhart@infradead.org> wrote:
> On Thu, Jul 13, 2017 at 01:06:14PM +0300, Andy Shevchenko wrote:
>> On Thu, 2017-07-13 at 11:42 +0200, Carlo Caione wrote:
>> > From: Carlo Caione <carlo@endlessm.com>
>> >
>> > Read the enable register to determine if the clock is already in use
>> > by
>> > the firmware. In this case avoid gating the clock.
>> >
>>
>> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
>>
>> I suppose it should go via clock tree.
>>
>> > Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
>> > Signed-off-by: Carlo Caione <carlo@endlessm.com>
>> > ---
>> >  drivers/clk/x86/clk-pmc-atom.c | 7 +++++++
>> >  1 file changed, 7 insertions(+)
>> >
>> > diff --git a/drivers/clk/x86/clk-pmc-atom.c b/drivers/clk/x86/clk-pmc-
>> > atom.c
>> > index 2b60577703ef..3c73d2e564ca 100644
>> > --- a/drivers/clk/x86/clk-pmc-atom.c
>> > +++ b/drivers/clk/x86/clk-pmc-atom.c
>> > @@ -185,6 +185,13 @@ static struct clk_plt *plt_clk_register(struct
>> > platform_device *pdev, int id,
>> >     pclk->reg = base + PMC_CLK_CTL_OFFSET + id *
>> > PMC_CLK_CTL_SIZE;
>> >     spin_lock_init(&pclk->lock);
>> >
>> > +   /*
>> > +    * If the clock was already enabled by the firmware mark is a
>> > critical
>
> Nit... I think this should read... "mark it as critical" ?
>
>> > +    * to avoid it being gated by the clock framework if no
>> > driver owns it
>
> owns it.

Ooops. Yeah, submitting a v3 with better spelling and your ACKs.

Thanks,

-- 
Carlo Caione  |  +39.340.80.30.096  |  Endless