From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Philipp Zabel <p.zabel@pengutronix.de>, Joel Stanley <joel@jms.id.au>
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
linux-clk@vger.kernel.org, Ryan Chen <ryan_chen@aspeedtech.com>,
Linus Walleij <linus.walleij@linaro.org>,
Andrew Jeffery <andrew@aj.id.au>, Jeremy Kerr <jk@ozlabs.org>
Subject: Re: Coupled clk/reset
Date: Wed, 19 Jul 2017 07:14:18 +1000 [thread overview]
Message-ID: <1500412458.2865.121.camel@kernel.crashing.org> (raw)
In-Reply-To: <1500386760.9510.9.camel@pengutronix.de>
On Tue, 2017-07-18 at 16:06 +0200, Philipp Zabel wrote:
> If this is some special treatment for a single IP block, I'd just open
> code this in the driver:
> reset_control_assert(rstc);
> usleep_range(100, 200);
> clk_prepare_enable(clk);
> usleep_range(10000, 20000);
> reset_control_deassert(rstc);
>
> If this is a common pattern needed for multiple clocks, you could
> investigate hiding this in the clock driver and not export the resets to
> the 'engine' driver at all.
Right, it's a common pattern for all the IP blocks in that SoC. I agree
with your proposal, it would keep things simpler.
Cheers,
Ben.
next prev parent reply other threads:[~2017-07-18 21:14 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-18 10:23 Coupled clk/reset Joel Stanley
2017-07-18 10:56 ` Benjamin Herrenschmidt
2017-07-18 14:25 ` Philipp Zabel
2017-07-18 14:06 ` Philipp Zabel
2017-07-18 21:14 ` Benjamin Herrenschmidt [this message]
2017-07-19 3:08 ` Joel Stanley
2017-07-19 8:10 ` Peter De Schrijver
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