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References: <20250513234837.2859-1-matthew.gerlach@altera.com> <175133195554.4372.1414444579635929023@lazor> <7dd9bca2-6c09-4067-b3f8-9bdc10dea39f@altera.com>
Subject: Re: [PATCH v5] clk: socfpga: agilex: add support for the Intel Agilex5
From: Stephen Boyd <sboyd@kernel.org>
Cc: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>, Teh Wen Ping <wen.ping.teh@intel.com>
To: Matthew Gerlach <matthew.gerlach@altera.com>, dinguyen@kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, mturquette@baylibre.com, netdev@vger.kernel.org, richardcochran@gmail.com
Date: Sun, 21 Sep 2025 10:59:51 -0700
Message-ID: <175847759120.4354.5284082297601743277@lazor>
User-Agent: alot/0.11

Quoting Matthew Gerlach (2025-07-02 09:04:17)
> On 6/30/25 6:05 PM, Stephen Boyd wrote:
> > Quoting Matthew Gerlach (2025-05-13 16:48:37)
> > > @@ -334,6 +336,375 @@ static const struct stratix10_gate_clock agilex=
_gate_clks[] =3D {
> > >           10, 0, 0, 0, 0, 0, 4},
> > >  };
> > > =20
> > > +static const struct clk_parent_data agilex5_pll_mux[] =3D {
> > > +       { .name =3D "osc1", },
> > > +       { .name =3D "cb-intosc-hs-div2-clk", },
> > > +       { .name =3D "f2s-free-clk", },
> >
> > Please don't use clk_parent_data with only .name set with dot
> > initializers. This is actually { .index =3D 0, .name =3D "..." } which =
means
> > the core is looking at the DT node for the first index of the 'clocks'
> If the core should be looking for the first index of the 'clocks'=20
> property, is it better to explicitly to state ".index =3D 0" or just have=
=20
> the name?

Be explicit with '.index =3D 0' and don't have a '.name' member.