From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8E5722144C7; Sun, 21 Sep 2025 20:14:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758485664; cv=none; b=C7NBNU3NhdHGDEkD7hZDufmUsGbWe+t/UksVIAjksOJSGqiXCno5qtfBmW1OSk6VECzv4dgAWuA1tv6byAaBF3LWdL5G4iZZmRGFZCQtRBOiHrYauupbMGplK1y/Om7t23dGjkrqQpXwx58L8gFXLwOXBJ6ZnD6trcfb5qM5KZA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758485664; c=relaxed/simple; bh=n42wuk3fRc2TVRisCoqEGhMVO97pJsliEokdZLTtgUI=; h=Content-Type:MIME-Version:In-Reply-To:References:Subject:From:Cc: To:Date:Message-ID; b=NdXgq3kg1jw1wXzODGO7755Ypl7bCBA22UClWM9w3OkAcDO5A4VtZ1t2FoTd61d3lEoMf4S4nSc0u8jcxQMvfWX2cSfg9I754jEO9faYS3doQvI+t8xgc3ncmEqWzEWPtHelAxx20buU77lGpSUScRXX7SKrgrIfSWKb68ZMo90= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ik1F8vFl; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ik1F8vFl" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E4A8FC113D0; Sun, 21 Sep 2025 20:14:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1758485664; bh=n42wuk3fRc2TVRisCoqEGhMVO97pJsliEokdZLTtgUI=; h=In-Reply-To:References:Subject:From:Cc:To:Date:From; b=ik1F8vFlhgeEufvWs7RZ9i4++Y6dbD/OC6O/1znESUCp+t8/7tBmKMDz1O0+4kRKN GCBaTdy9VJOKZkLEtKBArW9mo9B8QGGp9UtvCe0ET0GHRfPktVBWzJHqUBKyrJlmip d4ROLrGMv8ZxI9OHZK9KnxWsezjFEMynoT64DLlHlwZufX9RznzuJL4GOV/YeQspLE 3Tr8zuvp6MqeT8sedQst3GjqHi3+TAj29+jYvjgAuZxXW/vDvctl5QRj8J3Z09mtDf BDLD/wl6fx3c+hOLPHgk6xkH6Kser6Ng3rDkF67roBvbiFrrc+BAZA1zx9MB9nHQv8 /fTg/12iOYKpg== Content-Type: text/plain; charset="utf-8" Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: <20250917020539.3690324-2-ryan_chen@aspeedtech.com> References: <20250917020539.3690324-1-ryan_chen@aspeedtech.com> <20250917020539.3690324-2-ryan_chen@aspeedtech.com> Subject: Re: [PATCH v14 1/3] dt-bindings: clock: ast2700: modify soc0/1 clock define From: Stephen Boyd Cc: Krzysztof Kozlowski To: Andrew Jeffery , Conor Dooley , Joel Stanley , Krzysztof Kozlowski , Michael Turquette , Mo Elbadry , Philipp Zabel , Rob Herring , Rom Lemarchand , William Kennington , Yuxiao Zhang , devicetree@vger.kernel.org, dkodihalli@nvidia.com, leohu@nvidia.com, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, ryan_chen , spuranik@nvidia.com, wthai@nvidia.com Date: Sun, 21 Sep 2025 13:14:22 -0700 Message-ID: <175848566245.4354.2484705489084607414@lazor> User-Agent: alot/0.11 Quoting Ryan Chen (2025-09-16 19:05:37) > -add SOC0_CLK_AHBMUX: > add SOC0_CLK_AHBMUX for ahb clock source divide. > mpll-> > ahb_mux -> div_table -> clk_ahb > hpll-> >=20 > -new add clock: > SOC0_CLK_MPHYSRC: UFS MPHY clock source. > SOC0_CLK_U2PHY_REFCLKSRC: USB2.0 phy clock reference source. > SOC1_CLK_I3C: I3C clock source. >=20 > Signed-off-by: Ryan Chen > Acked-by: Krzysztof Kozlowski > --- Applied to clk-next