Linux clock framework development
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From: Stephen Boyd <sboyd@kernel.org>
To: "Nuno Sá via B4 Relay" <devnull+nuno.sa.analog.com@kernel.org>,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	nuno.sa@analog.com
Cc: Michael Turquette <mturquette@baylibre.com>
Subject: Re: [PATCH RESEND] clk: clk-axi-clkgen: Add support versal timings
Date: Tue, 28 Apr 2026 19:16:26 -0700	[thread overview]
Message-ID: <177742898605.5403.497070367355773947@localhost.localdomain> (raw)
In-Reply-To: <20260424-clk-axi-clk-versal-support-v1-1-ea070f83db7e@analog.com>

Quoting Nuno Sá via B4 Relay (2026-04-24 10:29:04)
> From: Nuno Sá <nuno.sa@analog.com>
> 
> Add proper VCO and PFD limits for versal based platforms. For that we
> need to add new Technology and Speed grade defines.
> 
> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
> ---

Applied to clk-next

      parent reply	other threads:[~2026-04-29  3:47 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-24 17:29 [PATCH RESEND] clk: clk-axi-clkgen: Add support versal timings Nuno Sá via B4 Relay
2026-04-24 18:54 ` Brian Masney
2026-04-29  2:16 ` Stephen Boyd [this message]

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