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AJvYcCWkoLdaDkjl7J/ZjIg543QhAOdBTGQbD+5DxVY3U6EU2u3dK09Yazc0xHTTxQC3MUWzCdaPwGy4W+g=@vger.kernel.org X-Gm-Message-State: AOJu0Yx+Mqp4/aWSgFwSdoJC7Gmlkjbehx6yLHUCXEq5n0CLsbgKAfWb wG/sHDwoOOA7+KVachkxtw5EbV7S3gb75jmfgASlISdAd36aepI4xqkRfs/DtT0wG0E9C2aezGm j X-Google-Smtp-Source: AGHT+IHDX9/slgT7/GdTZaLJCStso5CFJJOwulNYGKNVh415YS6OSuMHAUYkJOcO8PCpOKwoXIevOA== X-Received: by 2002:a05:6000:1b0d:b0:371:8bc9:167c with SMTP id ffacd0b85a97d-3749b581bcbmr3787062f8f.41.1725004270786; Fri, 30 Aug 2024 00:51:10 -0700 (PDT) Received: from [192.168.50.4] ([82.78.167.144]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-374b67ff88dsm190333f8f.26.2024.08.30.00.51.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 30 Aug 2024 00:51:10 -0700 (PDT) Message-ID: <1ced21cf-9e67-41dd-8ee3-7f8d138d4fac@tuxon.dev> Date: Fri, 30 Aug 2024 10:51:08 +0300 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/3] clk: renesas: r9a08g045: Mark the watchdog and always-on PM domains as IRQ safe Content-Language: en-US To: Geert Uytterhoeven Cc: mturquette@baylibre.com, sboyd@kernel.org, wim@linux-watchdog.org, linux@roeck-us.net, ulf.hansson@linaro.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-pm@vger.kernel.org, Claudiu Beznea References: <20240828140602.1006438-1-claudiu.beznea.uj@bp.renesas.com> <20240828140602.1006438-3-claudiu.beznea.uj@bp.renesas.com> From: claudiu beznea In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hi, Geert, On 29.08.2024 15:45, Geert Uytterhoeven wrote: > Hi Claudiu, > > On Wed, Aug 28, 2024 at 4:06 PM Claudiu wrote: >> From: Claudiu Beznea >> >> If the watchdog is part of a dedicated power domain (as it may be on >> RZ/G3S) the watchdog PM domain need to be powered on in the watchdog >> restart handler. Currently, only the clocks are enabled in the watchdog >> restart handler. To be able to also power on the PM domain we need to >> call pm_runtime_resume_and_get() on the watchdog restart handler, mark >> the watchdog device as IRQ safe and register the watchdog PM domain >> with GENPD_FLAG_IRQ_SAFE. >> >> Register watchdog PM domain as IRQ safe. Along with it the always-on >> PM domain (parent of the watchdog domain) was marked as IRQ safe. >> >> Signed-off-by: Claudiu Beznea >> --- >> >> Changes in v2: >> - changed patch title; it was "clk: renesas: rzg2l-cpg: Mark >> watchdog and always-on PM domains as IRQ safe" > > Thanks for the update! > >> --- a/drivers/clk/renesas/r9a08g045-cpg.c >> +++ b/drivers/clk/renesas/r9a08g045-cpg.c >> @@ -259,7 +259,7 @@ static const struct rzg2l_cpg_pm_domain_init_data r9a08g045_pm_domains[] = { >> /* Keep always-on domain on the first position for proper domains registration. */ >> DEF_PD("always-on", R9A08G045_PD_ALWAYS_ON, >> DEF_REG_CONF(0, 0), >> - GENPD_FLAG_ALWAYS_ON), >> + GENPD_FLAG_ALWAYS_ON | GENPD_FLAG_IRQ_SAFE), >> DEF_PD("gic", R9A08G045_PD_GIC, >> DEF_REG_CONF(CPG_BUS_ACPU_MSTOP, BIT(3)), >> GENPD_FLAG_ALWAYS_ON), >> @@ -270,7 +270,8 @@ static const struct rzg2l_cpg_pm_domain_init_data r9a08g045_pm_domains[] = { >> DEF_REG_CONF(CPG_BUS_REG1_MSTOP, GENMASK(3, 0)), >> GENPD_FLAG_ALWAYS_ON), >> DEF_PD("wdt0", R9A08G045_PD_WDT0, >> - DEF_REG_CONF(CPG_BUS_REG0_MSTOP, BIT(0)), 0), >> + DEF_REG_CONF(CPG_BUS_REG0_MSTOP, BIT(0)), >> + GENPD_FLAG_IRQ_SAFE), >> DEF_PD("sdhi0", R9A08G045_PD_SDHI0, >> DEF_REG_CONF(CPG_BUS_PERI_COM_MSTOP, BIT(0)), 0), >> DEF_PD("sdhi1", R9A08G045_PD_SDHI1, > > Can't you just do this for all domains (e.g. in rzg2l_cpg_pd_setup()), > instead of limiting this to the wdt0 and always-on domains? I thought about it but this, too, but I wasn't sure about the behavior of the currently unexplored drivers for RZ/G3S. AFAICT from the current code investigation, if this approach is implemented we need to be sure there is no sleeping in drivers runtime PM APIs. Thank you, Claudiu Beznea > > Gr{oetje,eeting}s, > > Geert >