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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: gth4S0ditWWyc7Uk7qXCIx_u5vOWvZ2W X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA5MDExNiBTYWx0ZWRfXxWt0eWwMtSb1 bzsCsLaZkO5W8xssfk2NyuOM8ounlf1JmsWuDeP+8m6EomrKJfW/tMfWOxwSzwSpzq2UN7SBMfi jMe2mzGnRg7x1nz/K8o5P6nkItOOE3ER74Ft1n9Pz1sgXUo5Oog2c4iWczqwweUTw25gEEAChjK Fpgl1IuEmlOHTP/NZMhehgCkyRo3LWO0gANviDjjHqzo/srnoHwSjWa4ieDiTXBYvjt9lIOMWZd SZGQEWXqYGev+iILhFJ6/XMZnLyBfSBMDQAvQFPEhW4fPgaTsmHMIeh8B/chE4Tm31dxab/lMIC mEAqmMHq0H3qZBfdnjWCLUR5QbWYyCVgXo4W62/hrzEnX0pUJZ6a3dXuf8kit1FDT3Q/dcij451 Z2ygGTVx4AFYrcVSEyFIJOrZIoO8XXKR4m4GlHCsHiNAMsmr/ERj4dkFDr0OiaS43KUcqxpriY8 Sf06mYrFtGQxdrSt8RA== X-Proofpoint-GUID: gth4S0ditWWyc7Uk7qXCIx_u5vOWvZ2W X-Authority-Analysis: v=2.4 cv=doTrzVg4 c=1 sm=1 tr=0 ts=6a280556 cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=wxLWbCv9AAAA:8 a=RM3L-PboR186kqoymW8A:9 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 a=QJY96suAAestDpCc5Gi9:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-09_02,2026-06-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 bulkscore=0 lowpriorityscore=0 priorityscore=1501 impostorscore=0 phishscore=0 clxscore=1015 malwarescore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606090116 On 6/1/26 10:51 AM, Antony Kurniawan Soemardi via B4 Relay wrote: > From: Antony Kurniawan Soemardi > > The RPM clock controller manages clocks shared between the application > processor and the RPM firmware, including fabric and bus clocks required > by several peripherals. > > With the RPM clock controller now available in the device tree, the USB > controller must explicitly declare its dependency on > RPM_DAYTONA_FABRIC_CLK. Without this declaration, the clock framework > would consider it unused and disable it, breaking USB functionality. > > This also corrects the previous misuse of USB_HS1_XCVR_CLK as the core > clock. The XCVR clock is in fact used for PHY/reset handling rather than > as the main core clock. > > A similar issue has been observed on APQ8064, where missing the RPM > fabric clock dependency leads to broken USB. > > Signed-off-by: Antony Kurniawan Soemardi > --- > @@ -507,8 +519,12 @@ usb1: usb@12500000 { > reg = <0x12500000 0x200>, > <0x12500200 0x200>; > interrupts = ; > - clocks = <&gcc USB_HS1_XCVR_CLK>, <&gcc USB_HS1_H_CLK>; > - clock-names = "core", "iface"; > + clocks = <&gcc USB_HS1_H_CLK>, > + <&rpmcc RPM_DAYTONA_FABRIC_CLK>, > + <&gcc USB_HS1_XCVR_CLK>; > + clock-names = "iface", > + "core", > + "fs"; The bindings change you sent changes the expectations - "core" used to be the first clock. And I would guesstimate that the DAYTONA_FABRIC clock is not really "core" - does downstream do any ratesetting on the other two? Konrad