Re: [PATCH 1/3] dt-bindings: clock: sunxi: Export PLL_VIDEO_2X and PLL_MIPI

[Dragan Simic <dsimic@manjaro.org>]

Hello Vasily,

On 2024-12-15 06:34, Vasily Khoruzhick wrote:
> These will be used to explicitly select TCON0 clock parent in dts
> 
> Fixes: ca1170b69968 ("clk: sunxi-ng: a64: force select PLL_MIPI in 
> TCON0 mux")
> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>

Looking good to me, as a preparatory patch.  Please feel free
to include

Reviewed-by: Dragan Simic <dsimic@manjaro.org>

> ---
>  drivers/clk/sunxi-ng/ccu-sun50i-a64.h      | 2 --
>  include/dt-bindings/clock/sun50i-a64-ccu.h | 2 ++
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
> b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
> index a8c11c0b4e06..dfba88a5ad0f 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
> +++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
> @@ -21,7 +21,6 @@
> 
>  /* PLL_VIDEO0 exported for HDMI PHY */
> 
> -#define CLK_PLL_VIDEO0_2X		8
>  #define CLK_PLL_VE			9
>  #define CLK_PLL_DDR0			10
> 
> @@ -32,7 +31,6 @@
>  #define CLK_PLL_PERIPH1_2X		14
>  #define CLK_PLL_VIDEO1			15
>  #define CLK_PLL_GPU			16
> -#define CLK_PLL_MIPI			17
>  #define CLK_PLL_HSIC			18
>  #define CLK_PLL_DE			19
>  #define CLK_PLL_DDR1			20
> diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h
> b/include/dt-bindings/clock/sun50i-a64-ccu.h
> index 175892189e9d..4f220ea7a23c 100644
> --- a/include/dt-bindings/clock/sun50i-a64-ccu.h
> +++ b/include/dt-bindings/clock/sun50i-a64-ccu.h
> @@ -44,7 +44,9 @@
>  #define _DT_BINDINGS_CLK_SUN50I_A64_H_
> 
>  #define CLK_PLL_VIDEO0		7
> +#define CLK_PLL_VIDEO0_2X	8
>  #define CLK_PLL_PERIPH0		11
> +#define CLK_PLL_MIPI		17
> 
>  #define CLK_CPUX		21
>  #define CLK_BUS_MIPI_DSI	28