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From: Jerome Brunet <jbrunet@baylibre.com>
To: Chuan Liu via B4 Relay <devnull+chuan.liu.amlogic.com@kernel.org>
Cc: Neil Armstrong <neil.armstrong@linaro.org>,
	 Michael Turquette <mturquette@baylibre.com>,
	 Stephen Boyd <sboyd@kernel.org>,  Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	 chuan.liu@amlogic.com, linux-amlogic@lists.infradead.org,
	 linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	 linux-kernel@vger.kernel.org
Subject: Re: [PATCH 00/13] clk: amlogic: Introduce A9 PLL and CCU driver support
Date: Wed, 11 Feb 2026 09:34:52 +0100	[thread overview]
Message-ID: <1jseb7y8yb.fsf@starbuckisacylon.baylibre.com> (raw)
In-Reply-To: <20260209-a9_clock_driver-v1-0-a9198dc03d2a@amlogic.com> (Chuan Liu via's message of "Mon, 09 Feb 2026 13:48:46 +0800")

On lun. 09 févr. 2026 at 13:48, Chuan Liu via B4 Relay <devnull+chuan.liu.amlogic.com@kernel.org> wrote:

> This patch adds driver support for Phase-Locked Loop (PLL) controllers
> and Clock Control Units (CCUs) in A9 SoC family.
>
> In the A9 SoC architecture, PLLs and clock control units are implemented
> as standardized hardware instances to reduce unnecessary differentiation
> across individual units.
>
> All A9 PLLs and CCUs are exposed as device tree nodes, providing an
> accurate representation of the SoC's internal clock hardware structure.
>
> These drivers are designed for reuse in subsequent SoC generations,
> guaranteeing code inheritance and maximizing reusability.
>
> Makefile rules compile A9 PLL and CCU drivers into clk-amlogic.o (see
> drivers/clk/amlogic/Makefile), simplifying deployment and enhancing load
> efficiency (single insmod for kernel module).
>
> Since the foundational A9 DTS hasn't been upstreamed yet, I'm temporarily
> pushing the PLL/CCU DTS files to github for driver comprehension [1].
> These patches will be included in a later release after the base A9 DTS
> is merged.

Creating a new vendor directory and re-inventing supported driver
without an explanation, coding style, build problems ... the list goes
on. You've outdone yourself !

So NACK.

Chuan has been warned numerous times about his submission to the kernel
mailing lists, without a noticeable effect. I can only suggest other
reviewers do not waste their time reviewing this.

>
> [1] https://github.com/torvalds/linux/commit/d6a82e4cce675fa5146c5f638c2a926c1c8cb1d9
>
> Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
> ---
> Chuan Liu (13):
>       dt-bindings: clock: Add Amlogic A9 standardized model clock control units
>       dt-bindings: clock: Add Amlogic A9 PLL controllers
>       dt-bindings: clock: Add Amlogic A9 misc clock control units
>       clk: amlogic: Add basic clock driver
>       clk: amlogic: Add composite clock driver
>       clk: amlogic: Add noglitch clock driver
>       clk: amlogic: Add duandiv clock driver
>       clk: amlogic: Add PLL driver
>       clk: amlogic: Add DT-based clock registration functions
>       clk: amlogic: Add A9 standardized model clock control units driver
>       clk: amlogic: Add A9 PLL controllers driver
>       clk: amlogic: Add A9 misc clock control units driver
>       clk: amlogic: Add support for building as combined kernel module
>
>  .../bindings/clock/amlogic,a9-misc-ccu.yaml        | 523 +++++++++++
>  .../bindings/clock/amlogic,a9-model-ccu.yaml       | 435 +++++++++
>  .../devicetree/bindings/clock/amlogic,a9-pll.yaml  | 134 +++
>  drivers/clk/Kconfig                                |   1 +
>  drivers/clk/Makefile                               |   1 +
>  drivers/clk/amlogic/Kconfig                        |  52 ++
>  drivers/clk/amlogic/Makefile                       |  23 +
>  drivers/clk/amlogic/a9-misc-ccu.c                  | 970 +++++++++++++++++++++
>  drivers/clk/amlogic/a9-model-ccu.c                 | 475 ++++++++++
>  drivers/clk/amlogic/a9-pll.c                       | 156 ++++
>  drivers/clk/amlogic/clk-basic.c                    | 219 +++++
>  drivers/clk/amlogic/clk-basic.h                    |  39 +
>  drivers/clk/amlogic/clk-composite.c                | 280 ++++++
>  drivers/clk/amlogic/clk-composite.h                |  20 +
>  drivers/clk/amlogic/clk-dualdiv.c                  | 365 ++++++++
>  drivers/clk/amlogic/clk-dualdiv.h                  |  27 +
>  drivers/clk/amlogic/clk-module.c                   |  42 +
>  drivers/clk/amlogic/clk-module.h                   |  53 ++
>  drivers/clk/amlogic/clk-noglitch.c                 | 584 +++++++++++++
>  drivers/clk/amlogic/clk-noglitch.h                 |  29 +
>  drivers/clk/amlogic/clk-pll.c                      | 701 +++++++++++++++
>  drivers/clk/amlogic/clk-pll.h                      |  43 +
>  drivers/clk/amlogic/clk.c                          | 464 ++++++++++
>  drivers/clk/amlogic/clk.h                          |  56 ++
>  include/dt-bindings/clock/amlogic,a9-misc-ccu.h    |  53 ++
>  25 files changed, 5745 insertions(+)
> ---
> base-commit: 4d310797262f0ddf129e76c2aad2b950adaf1fda
> change-id: 20260130-a9_clock_driver-ddd90357848c
>
> Best regards,

-- 
Jerome

      parent reply	other threads:[~2026-02-11  8:34 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-09  5:48 [PATCH 00/13] clk: amlogic: Introduce A9 PLL and CCU driver support Chuan Liu via B4 Relay
2026-02-09  5:48 ` [PATCH 01/13] dt-bindings: clock: Add Amlogic A9 standardized model clock control units Chuan Liu via B4 Relay
2026-02-09 13:14   ` Krzysztof Kozlowski
2026-04-08 14:37     ` Chuan Liu
2026-02-09 13:18   ` Krzysztof Kozlowski
2026-02-09  5:48 ` [PATCH 02/13] dt-bindings: clock: Add Amlogic A9 PLL controllers Chuan Liu via B4 Relay
2026-02-09  5:48 ` [PATCH 03/13] dt-bindings: clock: Add Amlogic A9 misc clock control units Chuan Liu via B4 Relay
2026-02-09 13:15   ` Krzysztof Kozlowski
2026-02-09  5:48 ` [PATCH 04/13] clk: amlogic: Add basic clock driver Chuan Liu via B4 Relay
2026-02-09 13:17   ` Krzysztof Kozlowski
2026-04-08 14:32     ` Chuan Liu
2026-04-08 17:34       ` Jerome Brunet
2026-04-09  6:12       ` Krzysztof Kozlowski
2026-02-09  5:48 ` [PATCH 05/13] clk: amlogic: Add composite " Chuan Liu via B4 Relay
2026-02-09 13:18   ` Krzysztof Kozlowski
2026-02-09  5:48 ` [PATCH 06/13] clk: amlogic: Add noglitch " Chuan Liu via B4 Relay
2026-02-09 21:51   ` Martin Blumenstingl
2026-04-08 14:44     ` Chuan Liu
2026-02-09  5:48 ` [PATCH 07/13] clk: amlogic: Add duandiv " Chuan Liu via B4 Relay
2026-02-09  5:48 ` [PATCH 08/13] clk: amlogic: Add PLL driver Chuan Liu via B4 Relay
2026-02-09 15:37   ` kernel test robot
2026-02-09 17:35   ` kernel test robot
2026-02-09  5:48 ` [PATCH 09/13] clk: amlogic: Add DT-based clock registration functions Chuan Liu via B4 Relay
2026-02-09  5:48 ` [PATCH 10/13] clk: amlogic: Add A9 standardized model clock control units driver Chuan Liu via B4 Relay
2026-02-09  5:48 ` [PATCH 11/13] clk: amlogic: Add A9 PLL controllers driver Chuan Liu via B4 Relay
2026-02-09  5:48 ` [PATCH 12/13] clk: amlogic: Add A9 misc clock control units driver Chuan Liu via B4 Relay
2026-02-09  5:48 ` [PATCH 13/13] clk: amlogic: Add support for building as combined kernel module Chuan Liu via B4 Relay
2026-02-11  8:34 ` Jerome Brunet [this message]

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