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Wed, 01 Oct 2025 00:45:07 -0700 (PDT) From: Jerome Brunet To: Chuan Liu via B4 Relay Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , chuan.liu@amlogic.com, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Xianwei Zhao Subject: Re: [PATCH 00/19] clk: amlogic: Add PLLs and peripheral clocks for A4 and A5 SoCs In-Reply-To: <20250930-a4_a5_add_clock_driver-v1-0-a9acf7951589@amlogic.com> (Chuan Liu via's message of "Tue, 30 Sep 2025 17:37:13 +0800") References: <20250930-a4_a5_add_clock_driver-v1-0-a9acf7951589@amlogic.com> User-Agent: mu4e 1.12.9; emacs 30.1 Date: Wed, 01 Oct 2025 09:45:06 +0200 Message-ID: <1jv7kz3w1p.fsf@starbuckisacylon.baylibre.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Tue 30 Sep 2025 at 17:37, Chuan Liu via B4 Relay wrote: > This patch series includes changes related to the PLL and peripheral > clocks for both the A4 and A5 SoCs. > > The patches for A5 were previously submitted up to V3 by Xianwei. > https://lore.kernel.org/all/20250103-a5-clk-v3-0-a207ce83b9e9@amlogic.com/ > After friendly coordination, I=E2=80=99ve taken over and continued the > submission as part of this series. The dt-bindings patch retains Rob's > original "Reviewed-by" tag, and I hope this hasn=E2=80=99t caused any > additional confusion. ... and yet you restart the versioning of the series making it harder for people to follow that > > Both A4 and A5 belong to the Audio series. Judging by their names, one > might assume that A5 is an upgrade to A4, but in fact, A5 was released > a year earlier than A4. > > Since there are differences in the PLLs and peripheral clocks between > the A4 and A5 SoCs (especially the PLL), and taking into account factors > such as memory footprint and maintainability, this series does not > attempt to merge the two into a shared driver as was done for > G12A/G12B/SM1. ... and we end up with 19 patches series while it could be splitted into manageable series, for each controller of each SoC > > This patch series includes all related dt-bindings, driver, and dts > changes for the PLLs and peripheral clocks. Following our past convention > for clock-related submissions, the dts changes are placed at the end > and submitted separately. If this ordering makes it harder for > maintainers to review or pick patches, please feel free to point it out. > > Co-developed-by: Xianwei Zhao > Signed-off-by: Xianwei Zhao > Signed-off-by: Chuan Liu > --- > Chuan Liu (19): > dt-bindings: clock: Add Amlogic A4 SCMI clock controller > dt-bindings: clock: Add Amlogic A4 PLL clock controller > dt-bindings: clock: Add Amlogic A4 peripherals clock controller > clk: amlogic: Optimize PLL enable timing > clk: amlogic: Correct l_detect bit control > clk: amlogic: Fix out-of-range PLL frequency setting > clk: amlogic: Add A4 PLL clock controller driver > clk: amlogic: Add A4 clock peripherals controller driver > arm64: dts: amlogic: A4: Add scmi-clk node > arm64: dts: amlogic: A4: Add PLL controller node > arm64: dts: amlogic: A4: Add peripherals clock controller node > dt-bindings: clock: Add Amlogic A5 SCMI clock controller support > dt-bindings: clock: Add Amlogic A5 PLL clock controller > dt-bindings: clock: Add Amlogic A5 peripherals clock controller > clk: amlogic: Add A5 PLL clock controller driver > clk: amlogic: Add A5 clock peripherals controller driver > arm64: dts: amlogic: A5: Add scmi-clk node > arm64: dts: amlogic: A5: Add PLL controller node > arm64: dts: amlogic: A5: Add peripheral clock controller node > > .../clock/amlogic,a4-peripherals-clkc.yaml | 122 +++ > .../bindings/clock/amlogic,a4-pll-clkc.yaml | 61 ++ > .../clock/amlogic,a5-peripherals-clkc.yaml | 134 ++++ > .../bindings/clock/amlogic,a5-pll-clkc.yaml | 63 ++ > arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 80 ++ > arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 87 ++ > drivers/clk/meson/Kconfig | 53 ++ > drivers/clk/meson/Makefile | 4 + > drivers/clk/meson/a1-pll.c | 1 + > drivers/clk/meson/a4-peripherals.c | 764 +++++++++++++++= +++ > drivers/clk/meson/a4-pll.c | 242 ++++++ > drivers/clk/meson/a5-peripherals.c | 883 +++++++++++++++= ++++++ > drivers/clk/meson/a5-pll.c | 476 +++++++++++ > drivers/clk/meson/clk-pll.c | 76 +- > drivers/clk/meson/clk-pll.h | 2 + > .../clock/amlogic,a4-peripherals-clkc.h | 129 +++ > include/dt-bindings/clock/amlogic,a4-pll-clkc.h | 15 + > include/dt-bindings/clock/amlogic,a4-scmi-clkc.h | 42 + > .../clock/amlogic,a5-peripherals-clkc.h | 132 +++ > include/dt-bindings/clock/amlogic,a5-pll-clkc.h | 24 + > include/dt-bindings/clock/amlogic,a5-scmi-clkc.h | 44 + > 21 files changed, 3406 insertions(+), 28 deletions(-) > --- > base-commit: 01f3a6d1d59b8e25a6de243b0d73075cf0415eaf > change-id: 20250928-a4_a5_add_clock_driver-2b7c9d695633 > > Best regards, --=20 Jerome