From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 To: Kevin Hilman , "Bintian" From: Michael Turquette In-Reply-To: <7h4mmwip62.fsf@deeprootsystems.com> Cc: sboyd@codeaurora.org, zhangfei.gao@linaro.org, xuwei5@hisilicon.com, xuejiancheng@huawei.com, tomeu.vizoso@collabora.com, sledge.yanwei@huawei.com, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, will.deacon@arm.com, robh+dt@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, haojian.zhuang@linaro.org, linux-arm-kernel@lists.infradead.org, olof@lixom.net, yanhaifeng@gmail.com, linux@arm.linux.org.uk, guodong.xu@linaro.org, jorge.ramirez-ortiz@linaro.org, tyler.baker@linaro.org, xuyiping@hisilicon.com, wangbinghui@hisilicon.com, zhenwei.wang@hisilicon.com, victor.lixin@hisilicon.com, puck.chen@hisilicon.com, dan.zhao@hisilicon.com, huxinwei@huawei.com, z.liuxinliang@huawei.com, heyunlei@huawei.com, kong.kongxinwei@hisilicon.com, wangbintian@gmail.com, w.f@huawei.com, liguozhu@hisilicon.com References: <1432440671-25235-1-git-send-email-bintian.wang@huawei.com> <1432440671-25235-3-git-send-email-bintian.wang@huawei.com> <20150528052608.22384.96747@quantum> <5566CF13.8060806@huawei.com> <7h4mmwip62.fsf@deeprootsystems.com> Message-ID: <20150529010733.4469.33722@quantum> Subject: Re: [PATCH v8 6/7] clk: hi6220: Clock driver support for Hisilicon hi6220 SoC Date: Thu, 28 May 2015 18:07:33 -0700 List-ID: Quoting Kevin Hilman (2015-05-28 10:32:05) > Bintian writes: > = > > Hello Mike, > > > > On 2015/5/28 13:26, Michael Turquette wrote: > >> Quoting Bintian Wang (2015-05-23 21:11:11) > >>> Add clock drivers for hi6220 SoC, this driver controls the SoC > >>> registers to supply different clocks to different IPs in the SoC. > >>> > >>> We add one divider clock for hi6220 because the divider in hi6220 > >>> also has a mask bit but it doesnot obey the rule defined by flag > >>> "CLK_DIVIDER_HIWORD_MASK", we can not get index of the mask bit by > >>> left shift fixed bits (e.g. 16 bits), so we add this divider clock > >>> to handle it. > >>> > >>> Signed-off-by: Jorge Ramirez-Ortiz > >>> Signed-off-by: Bintian Wang > >>> Acked-by: Haojian Zhuang > >>> Reviewed-by: Zhangfei Gao > >>> Tested-by: Will Deacon > >>> Tested-by: Tyler Baker > >> > >> Hi Bintian, > >> > >> Thanks for making the changes requested by Stephen. I've taken his pat= ch > >> to add assigned-clock-rate/parent support for AMBA interconnects and > >> applied it to 4.1-rc1, and then I've applied your v8 patches #4-6 on t= op > >> of that. You can find it at: > >> > >> git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next-h= i6220 > > Thank you very much! > > > > I think you also need to pick patch "[PATCH v5 3/6] clk: hi6220: > > Document devicetree bindings for hi6220 clock", which described the > > dt binding of clk, and it is also acked by Stephen(v4 is the same to > > v5). > > > >> I have merged this into clk-next so it can get some cycles in > >> linux-next. > >> > >> Stephen, > >> > >> Can you send your patch out to Russell properly? It needs his ack (or > >> for him to take it outright) in order to unblock the hi6220 clock driv= er > >> from being merged. > > It doesn't block hi6220 clock driver now, because the UART1 is not > > enabled in hi6220 dts now. > = > Now that the clk changes are queued up, can you (re)post the remaining > hikey patches with a changelog stating the dependency on the clk-next > branch. I believe what's left is just the DT and Kconfig/defconfig > changes, correct? Just to be clear, clk-next-hi6220 is not an immutable branch. I just put it up to get some testing done on it. Depending on whether or not Russell acks Stephen's patch then it may be changed. Regards, Mike > = > With some acks from the DT maintainers, these should be ready to be > merged through arm-soc. > = > Thanks, > = > Kevin