From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from vps0.lunn.ch ([178.209.37.122]:43259 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755214AbbK0UbP (ORCPT ); Fri, 27 Nov 2015 15:31:15 -0500 Date: Fri, 27 Nov 2015 21:31:07 +0100 From: Andrew Lunn To: Rob Herring Cc: Russell King , Gregory Clement , Jason Cooper , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala Subject: Re: [PATCH 1/3] dt-bindings: add Marvell core PLL and clock divider PMU documentation Message-ID: <20151127203107.GD32356@lunn.ch> References: <20151127202114.GA613@rob-hp-laptop> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <20151127202114.GA613@rob-hp-laptop> Sender: linux-clk-owner@vger.kernel.org List-ID: > > +Marvell Dove has a 2GHz PLL, which feeds into a set of dividers to provide > > +high speed clocks for a number of peripherals. These dividers are part of > > +the PMU, and thus this node should be a child of the PMU node. > > It seems a bit strange to just be documenting these clocks. What about > the rest of the SOC clocks? $ ls Documentation/devicetree/bindings/clock/mvebu* Documentation/devicetree/bindings/clock/mvebu-core-clock.txt Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt Documentation/devicetree/bindings/clock/mvebu-cpu-clock.txt Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt Dove is a member of mvebu, and gets most of its clocks from these drivers. But it has additional clocks which are not shared with other members of mvebu. Andrew