From: Thierry Reding <thierry.reding@gmail.com>
To: Jon Hunter <jonathanh@nvidia.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Stephen Warren <swarren@wwwdotorg.org>,
Alexandre Courbot <gnurou@gmail.com>,
Rhyland Klein <rklein@nvidia.com>,
linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] clk: tegra: Fix clock sources for tegra210 EMC
Date: Wed, 13 Jan 2016 18:20:40 +0100 [thread overview]
Message-ID: <20160113172040.GS2588@ulmo> (raw)
In-Reply-To: <1450446328-6414-1-git-send-email-jonathanh@nvidia.com>
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On Fri, Dec 18, 2015 at 01:45:28PM +0000, Jon Hunter wrote:
> The EMC clock sources for tegra210 currently incorrectly include pll_c2
> and pll_c3. However, both of these should have been pll_mb as shown in
> the TRM. If tegra210 happens to be configured such that the pll_mb is the
> default clock for the EMC, as configured by the bootloader, then this will
> cause a system hang on boot. This is because the kernel will disable the
> pll_mb when disabling unused clock as it appears to be unused when it is
> not.
>
> Also add the additional pll_p clock source for the EMC.
>
> Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
> ---
> drivers/clk/tegra/clk-tegra210.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Applied, thanks.
Thierry
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prev parent reply other threads:[~2016-01-13 17:20 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-18 13:45 [PATCH] clk: tegra: Fix clock sources for tegra210 EMC Jon Hunter
2015-12-18 16:48 ` Rhyland Klein
2016-01-13 17:20 ` Thierry Reding [this message]
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