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Date: Mon, 1 Feb 2016 20:46:26 +0100
From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Chen-Yu Tsai <wens@csie.org>
Cc: Jens Kuske <jenskuske@gmail.com>,
	Mike Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Vishnu Patekar <vishnupatekar0510@gmail.com>,
	Hans de Goede <hdegoede@redhat.com>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	Jean-Francois Moine <moinejf@free.fr>
Subject: Re: [PATCH v3 2/2] clk: sunxi: Refactor A31 PLL6 so that it can be
 reused
Message-ID: <20160201194626.GH4652@lukather>
References: <1454008958-12655-1-git-send-email-maxime.ripard@free-electrons.com>
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On Fri, Jan 29, 2016 at 06:14:48PM +0800, Chen-Yu Tsai wrote:
> >> @@ -173,7 +173,7 @@
> >>                       #clock-cells =3D <0>;
> >>                       compatible =3D "allwinner,sun8i-h3-ahb2-clk";
> >>                       reg =3D <0x01c2005c 0x4>;
> >> -                     clocks =3D <&ahb1>, <&pll6d2>;
> >> +                     clocks =3D <&ahb1>, <&pll6>;
> >
> > According to the datasheet AHB2 really has PLL6 / 2 as parent, not PLL6
> > directly.
>=20
> Thanks for the save. So we should keep pll6d2_clk.

Indeed thanks for the review. Will fix for v4.

Maxime

--=20
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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