[PATCH 04/17] clk: qcom: ipq4019: switch remaining defines to enums

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* [PATCH 04/17] clk: qcom: ipq4019: switch remaining defines to enums
       [not found] <1458770712-10880-1-git-send-email-mmcclint@codeaurora.org>
@ 2016-03-23 22:04 ` Matthew McClintock
  2016-03-29 23:31   ` Stephen Boyd
  2016-03-23 22:05 ` [PATCH 05/17] clk: qcom: ipq4019: add some fixed clocks for ddrppl and fepll Matthew McClintock
  1 sibling, 1 reply; 4+ messages in thread
From: Matthew McClintock @ 2016-03-23 22:04 UTC (permalink / raw)
  To: andy.gross, linux-arm-msm
  Cc: qca-upstream.external, Matthew McClintock, Michael Turquette,
	Stephen Boyd, Senthilkumar N L, Varadarajan Narayanan,
	Pradeep Banavathi, open list:COMMON CLK FRAMEWORK, open list

When this was added not all the remaining defines were switched over to
use enums, so let's complete that process here

Reported-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
---
 drivers/clk/qcom/gcc-ipq4019.c | 60 ++++++++++++++++++------------------------
 1 file changed, 25 insertions(+), 35 deletions(-)

diff --git a/drivers/clk/qcom/gcc-ipq4019.c b/drivers/clk/qcom/gcc-ipq4019.c
index 21def7f..38ada8d 100644
--- a/drivers/clk/qcom/gcc-ipq4019.c
+++ b/drivers/clk/qcom/gcc-ipq4019.c
@@ -129,20 +129,10 @@ static const char * const gcc_xo_ddr_500_200[] = {
 };
 
 #define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) }
-#define P_XO 0
-#define FE_PLL_200 1
-#define FE_PLL_500 2
-#define DDRC_PLL_666  3
-
-#define DDRC_PLL_666_SDCC  1
-#define FE_PLL_125_DLY 1
-
-#define FE_PLL_WCSS2G 1
-#define FE_PLL_WCSS5G 1
 
 static const struct freq_tbl ftbl_gcc_audio_pwm_clk[] = {
 	F(48000000, P_XO, 1, 0, 0),
-	F(200000000, FE_PLL_200, 1, 0, 0),
+	F(200000000, P_FEPLL200, 1, 0, 0),
 	{ }
 };
 
@@ -334,15 +324,15 @@ static struct clk_branch gcc_blsp1_qup2_spi_apps_clk = {
 };
 
 static const struct freq_tbl ftbl_gcc_blsp1_uart1_2_apps_clk[] = {
-	F(1843200, FE_PLL_200, 1, 144, 15625),
-	F(3686400, FE_PLL_200, 1, 288, 15625),
-	F(7372800, FE_PLL_200, 1, 576, 15625),
-	F(14745600, FE_PLL_200, 1, 1152, 15625),
-	F(16000000, FE_PLL_200, 1, 2, 25),
+	F(1843200, P_FEPLL200, 1, 144, 15625),
+	F(3686400, P_FEPLL200, 1, 288, 15625),
+	F(7372800, P_FEPLL200, 1, 576, 15625),
+	F(14745600, P_FEPLL200, 1, 1152, 15625),
+	F(16000000, P_FEPLL200, 1, 2, 25),
 	F(24000000, P_XO, 1, 1, 2),
-	F(32000000, FE_PLL_200, 1, 4, 25),
-	F(40000000, FE_PLL_200, 1, 1, 5),
-	F(46400000, FE_PLL_200, 1, 29, 125),
+	F(32000000, P_FEPLL200, 1, 4, 25),
+	F(40000000, P_FEPLL200, 1, 1, 5),
+	F(46400000, P_FEPLL200, 1, 29, 125),
 	F(48000000, P_XO, 1, 0, 0),
 	{ }
 };
@@ -410,9 +400,9 @@ static struct clk_branch gcc_blsp1_uart2_apps_clk = {
 };
 
 static const struct freq_tbl ftbl_gcc_gp_clk[] = {
-	F(1250000,  FE_PLL_200, 1, 16, 0),
-	F(2500000,  FE_PLL_200, 1,  8, 0),
-	F(5000000,  FE_PLL_200, 1,  4, 0),
+	F(1250000,  P_FEPLL200, 1, 16, 0),
+	F(2500000,  P_FEPLL200, 1,  8, 0),
+	F(5000000,  P_FEPLL200, 1,  4, 0),
 	{ }
 };
 
@@ -512,11 +502,11 @@ static struct clk_branch gcc_gp3_clk = {
 static const struct freq_tbl ftbl_gcc_sdcc1_apps_clk[] = {
 	F(144000,    P_XO,			1,  3, 240),
 	F(400000,    P_XO,			1,  1, 0),
-	F(20000000,  FE_PLL_500,		1,  1, 25),
-	F(25000000,  FE_PLL_500,		1,  1, 20),
-	F(50000000,  FE_PLL_500,		1,  1, 10),
-	F(100000000, FE_PLL_500,		1,  1, 5),
-	F(193000000, DDRC_PLL_666_SDCC,		1,  0, 0),
+	F(20000000,  P_FEPLL500,		1,  1, 25),
+	F(25000000,  P_FEPLL500,		1,  1, 20),
+	F(50000000,  P_FEPLL500,		1,  1, 10),
+	F(100000000, P_FEPLL500,		1,  1, 5),
+	F(193000000, P_DDRPLL,		1,  0, 0),
 	{ }
 };
 
@@ -536,9 +526,9 @@ static struct clk_rcg2  sdcc1_apps_clk_src = {
 
 static const struct freq_tbl ftbl_gcc_apps_clk[] = {
 	F(48000000, P_XO,	   1, 0, 0),
-	F(200000000, FE_PLL_200,   1, 0, 0),
-	F(500000000, FE_PLL_500,   1, 0, 0),
-	F(626000000, DDRC_PLL_666, 1, 0, 0),
+	F(200000000, P_FEPLL200,   1, 0, 0),
+	F(500000000, P_FEPLL500,   1, 0, 0),
+	F(626000000, P_DDRPLLAPSS, 1, 0, 0),
 	{ }
 };
 
@@ -557,7 +547,7 @@ static struct clk_rcg2 apps_clk_src = {
 
 static const struct freq_tbl ftbl_gcc_apps_ahb_clk[] = {
 	F(48000000, P_XO,	   1, 0, 0),
-	F(100000000, FE_PLL_200,   2, 0, 0),
+	F(100000000, P_FEPLL200,   2, 0, 0),
 	{ }
 };
 
@@ -941,7 +931,7 @@ static struct clk_branch gcc_usb2_mock_utmi_clk = {
 };
 
 static const struct freq_tbl ftbl_gcc_usb30_mock_utmi_clk[] = {
-	F(2000000, FE_PLL_200, 10, 0, 0),
+	F(2000000, P_FEPLL200, 10, 0, 0),
 	{ }
 };
 
@@ -1008,7 +998,7 @@ static struct clk_branch gcc_usb3_mock_utmi_clk = {
 };
 
 static const struct freq_tbl ftbl_gcc_fephy_dly_clk[] = {
-	F(125000000, FE_PLL_125_DLY, 1, 0, 0),
+	F(125000000, P_FEPLL125DLY, 1, 0, 0),
 	{ }
 };
 
@@ -1028,7 +1018,7 @@ static struct clk_rcg2 fephy_125m_dly_clk_src = {
 
 static const struct freq_tbl ftbl_gcc_wcss2g_clk[] = {
 	F(48000000, P_XO, 1, 0, 0),
-	F(250000000, FE_PLL_WCSS2G, 1, 0, 0),
+	F(250000000, P_FEPLLWCSS2G, 1, 0, 0),
 	{ }
 };
 
@@ -1098,7 +1088,7 @@ static struct clk_branch gcc_wcss2g_rtc_clk = {
 
 static const struct freq_tbl ftbl_gcc_wcss5g_clk[] = {
 	F(48000000, P_XO, 1, 0, 0),
-	F(250000000, FE_PLL_WCSS5G, 1, 0, 0),
+	F(250000000, P_FEPLLWCSS5G, 1, 0, 0),
 	{ }
 };
 
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH 04/17] clk: qcom: ipq4019: switch remaining defines to enums
  2016-03-23 22:04 ` [PATCH 04/17] clk: qcom: ipq4019: switch remaining defines to enums Matthew McClintock
@ 2016-03-29 23:31   ` Stephen Boyd
  0 siblings, 0 replies; 4+ messages in thread
From: Stephen Boyd @ 2016-03-29 23:31 UTC (permalink / raw)
  To: Matthew McClintock
  Cc: andy.gross, linux-arm-msm, qca-upstream.external,
	Michael Turquette, Senthilkumar N L, Varadarajan Narayanan,
	Pradeep Banavathi, open list:COMMON CLK FRAMEWORK, open list

On 03/23, Matthew McClintock wrote:
> When this was added not all the remaining defines were switched over to
> use enums, so let's complete that process here
> 
> Reported-by: Stephen Boyd <sboyd@codeaurora.org>
> Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
> ---

Applied to clk-fixes

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH 05/17] clk: qcom: ipq4019: add some fixed clocks for ddrppl and fepll
       [not found] <1458770712-10880-1-git-send-email-mmcclint@codeaurora.org>
  2016-03-23 22:04 ` [PATCH 04/17] clk: qcom: ipq4019: switch remaining defines to enums Matthew McClintock
@ 2016-03-23 22:05 ` Matthew McClintock
  2016-03-29 23:31   ` Stephen Boyd
  1 sibling, 1 reply; 4+ messages in thread
From: Matthew McClintock @ 2016-03-23 22:05 UTC (permalink / raw)
  To: andy.gross, linux-arm-msm
  Cc: qca-upstream.external, Matthew McClintock, Michael Turquette,
	Stephen Boyd, Pradeep Banavathi, Senthilkumar N L,
	Varadarajan Narayanan, open list:COMMON CLK FRAMEWORK, open list

Drivers for these don't exist yet so we will add them as fixed clocks
so we don't BUG() if we change clocks that reference these clocks.

Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
---
 drivers/clk/qcom/gcc-ipq4019.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/clk/qcom/gcc-ipq4019.c b/drivers/clk/qcom/gcc-ipq4019.c
index 38ada8d..f0b0a5a 100644
--- a/drivers/clk/qcom/gcc-ipq4019.c
+++ b/drivers/clk/qcom/gcc-ipq4019.c
@@ -1316,6 +1316,16 @@ MODULE_DEVICE_TABLE(of, gcc_ipq4019_match_table);
 
 static int gcc_ipq4019_probe(struct platform_device *pdev)
 {
+	struct device *dev = &pdev->dev;
+
+	clk_register_fixed_rate(dev, "fepll125", "xo", 0, 200000000);
+	clk_register_fixed_rate(dev, "fepll125dly", "xo", 0, 200000000);
+	clk_register_fixed_rate(dev, "fepllwcss2g", "xo", 0, 200000000);
+	clk_register_fixed_rate(dev, "fepllwcss5g", "xo", 0, 200000000);
+	clk_register_fixed_rate(dev, "fepll200", "xo", 0, 200000000);
+	clk_register_fixed_rate(dev, "fepll500", "xo", 0, 200000000);
+	clk_register_fixed_rate(dev, "ddrpllapss", "xo", 0, 666000000);
+
 	return qcom_cc_probe(pdev, &gcc_ipq4019_desc);
 }
 
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH 05/17] clk: qcom: ipq4019: add some fixed clocks for ddrppl and fepll
  2016-03-23 22:05 ` [PATCH 05/17] clk: qcom: ipq4019: add some fixed clocks for ddrppl and fepll Matthew McClintock
@ 2016-03-29 23:31   ` Stephen Boyd
  0 siblings, 0 replies; 4+ messages in thread
From: Stephen Boyd @ 2016-03-29 23:31 UTC (permalink / raw)
  To: Matthew McClintock
  Cc: andy.gross, linux-arm-msm, qca-upstream.external,
	Michael Turquette, Pradeep Banavathi, Senthilkumar N L,
	Varadarajan Narayanan, open list:COMMON CLK FRAMEWORK, open list

On 03/23, Matthew McClintock wrote:
> Drivers for these don't exist yet so we will add them as fixed clocks
> so we don't BUG() if we change clocks that reference these clocks.
> 
> Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
> ---

Applied to clk-fixes

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2016-03-29 23:31 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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     [not found] <1458770712-10880-1-git-send-email-mmcclint@codeaurora.org>
2016-03-23 22:04 ` [PATCH 04/17] clk: qcom: ipq4019: switch remaining defines to enums Matthew McClintock
2016-03-29 23:31   ` Stephen Boyd
2016-03-23 22:05 ` [PATCH 05/17] clk: qcom: ipq4019: add some fixed clocks for ddrppl and fepll Matthew McClintock
2016-03-29 23:31   ` Stephen Boyd

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