Re: [PATCH 4/9] clk: sunxi-ng: mux: Add support for mux tables

Jean-Francois Moine
2016-07-27T07:18:27Z

On Wed, 27 Jul 2016 08:59:34 +0200
Maxime Ripard <maxime.ripard@free-electrons.com> wrote:

> On Tue, Jul 26, 2016 at 07:43:06PM +0200, Jean-Francois Moine wrote:
> > On Tue, 26 Jul 2016 15:04:26 +0800
> > Chen-Yu Tsai <wens@csie.org> wrote:
> >=20
> > > Some clock muxes have holes, i.e. invalid or unconnected inputs,
> > > between parent mux values.
> > >=20
> > > Add support for specifying a mux table to map clock parents to
> > > mux values.
> >=20
> > Putting empty strings in the holes should work. No?
> > Ex:
> >=20
> > static const char * const csi_mclk_parents[] =3D
> > { "pll-video0", "pll-video1", "", "", "", "osc24M" };
>=20
> Not really. The clock would be declared as orphan, while it's really
> not.
>=20
> Parenting functions would also not work as expected,
> clk_hw_get_parent_by_index being the obvious example, in that case
> returning the empty string for an invalid parent, while it should
> really return NULL.

I don't see why the clock should be orphan.
Then, when a parent is "", clk_hw_get_parent_by_index() returns NULL.

--=20
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