From: Stephen Boyd <sboyd@codeaurora.org>
To: Rajendra Nayak <rnayak@codeaurora.org>
Cc: mturquette@baylibre.com, linux-clk@vger.kernel.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
stanimir.varbanov@linaro.org, sricharan@codeaurora.org
Subject: Re: [PATCH v2] clk: qcom: gdsc: Fix handling of hw control enable/disable
Date: Thu, 26 Jan 2017 16:00:20 -0800 [thread overview]
Message-ID: <20170127000020.GJ8801@codeaurora.org> (raw)
In-Reply-To: <1485145581-517-1-git-send-email-rnayak@codeaurora.org>
On 01/23, Rajendra Nayak wrote:
> Once a gdsc is brought in and out of HW control, there is a
> power down and up cycle which can take upto 1us. Polling on
> the gdsc status immediately after the hw control enable/disable
> can mislead software/firmware to belive the gdsc is already either on
> or off, while its yet to complete the power cycle.
> To avoid this add a 1us delay post a enable/disable of HW control
> mode.
>
> Also after the HW control mode is disabled, poll on the status to
> check gdsc status reflects its 'on' before force disabling it
> in software.
>
> Reported-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
> ---
Applied to clk-next + I added a fixes tag. I don't think any
driver is affected by this problem in mainline, hence the punt to
v4.11.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
prev parent reply other threads:[~2017-01-27 0:00 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-23 4:26 [PATCH v2] clk: qcom: gdsc: Fix handling of hw control enable/disable Rajendra Nayak
2017-01-26 21:31 ` Stanimir Varbanov
2017-01-27 0:00 ` Stephen Boyd [this message]
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