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From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: "André Przywara" <andre.przywara@arm.com>
Cc: Mark Rutland <Mark.Rutland@arm.com>,
	devicetree@vger.kernel.org, alsa-devel@alsa-project.org,
	Vinod Koul <vinod.koul@intel.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org,
	Rob Herring <robh+dt@kernel.org>,
	Jaroslav Kysela <perex@perex.cz>,
	linux-gpio@vger.kernel.org, Chen-Yu Tsai <wens@csie.org>,
	Mark Brown <broonie@kernel.org>, Icenowy Zheng <icenowy@aosc.xyz>,
	dmaengine@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 05/10] arm: dts: sun8i: split Allwinner H3 .dtsi
Date: Mon, 30 Jan 2017 10:09:10 +0100	[thread overview]
Message-ID: <20170130090910.cer2nvedq3tjleih@lukather> (raw)
In-Reply-To: <2b8672bc-58ae-66a9-46d7-c7f3c5825a9d@arm.com>


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On Mon, Jan 30, 2017 at 01:42:40AM +0000, André Przywara wrote:
> > +&ccu {
> > +	compatible = "allwinner,sun8i-h3-ccu";
> > +};
> 
> I believe this kind of sharing nodes is a bit frowned upon in connection
> with sharing .dtsi's. If the compatible name differs, I think it
> deserves to be a separate node spelt out in each SoC's .dtsi.
> This also makes the DT more readable, since a reader doesn't have to
> refer to two files to see what's in that node.
> 
> >  
> > -		codec_analog: codec-analog@01f015c0 {
> > -			compatible = "allwinner,sun8i-h3-codec-analog";
> > -			reg = <0x01f015c0 0x4>;
> > -		};
> > +&mmc0 {
> > +	compatible = "allwinner,sun7i-a20-mmc";
> > +	clocks = <&ccu CLK_BUS_MMC0>,
> > +		 <&ccu CLK_MMC0>,
> > +		 <&ccu CLK_MMC0_OUTPUT>,
> > +		 <&ccu CLK_MMC0_SAMPLE>;
> > +	clock-names = "ahb",
> > +		      "mmc",
> > +		      "output",
> > +		      "sample";
> 
> This applies even more here, since the MMC controllers also have
> different clock requirements.
> 
> So why can't we just leave the CCU, MMC and possibly the pinctrl nodes
> completely out of the shared h3-h5.dtsi and introduce them from scratch
> in the SoC specific .dtsi?
> 
> I think we still have enough identical nodes to justify this kind of
> .dtsi sharing.

We did it that way in the past in order to reduce the unneeded
duplication, but I can definitely understand your point. We'll wait
for the DT maintainers answer on this one.

Thanks,
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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  reply	other threads:[~2017-01-30  9:09 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-29  2:33 [PATCH v3 00/10] Allwinner H5 and Orange Pi PC2 support Icenowy Zheng
2017-01-29  2:33 ` [PATCH v3 01/10] drivers: pinctrl: add driver for Allwinner H5 SoC Icenowy Zheng
2017-01-30 15:23   ` Linus Walleij
2017-01-29  2:33 ` [PATCH v3 02/10] arm64: allwinner: Kconfig: add essential pinctrl driver for H5 Icenowy Zheng
2017-01-29  2:33 ` [PATCH v3 03/10] clk: sunxi-ng: rename sun8i-h3 driver to sunxi-h3-h5 Icenowy Zheng
2017-01-30  9:03   ` Maxime Ripard
2017-01-29  2:33 ` [PATCH v3 04/10] clk: sunxi-ng: add support for Allwinner H5 SoC Icenowy Zheng
2017-01-30  9:04   ` Maxime Ripard
2017-01-29  2:33 ` [PATCH v3 05/10] arm: dts: sun8i: split Allwinner H3 .dtsi Icenowy Zheng
2017-01-30  1:42   ` André Przywara
2017-01-30  9:09     ` Maxime Ripard [this message]
2017-01-30  9:06   ` Maxime Ripard
2017-01-29  2:33 ` [PATCH v3 06/10] clk: sunxi-ng: remove transitional headers for dt-bindings Icenowy Zheng
2017-01-30  9:09   ` Maxime Ripard
2017-01-29  2:33 ` [PATCH v3 07/10] arm64: dts: allwinner: add Allwinner H5 .dtsi Icenowy Zheng
2017-01-29  2:33 ` [PATCH v3 08/10] dmaengine: sun6i: allow build on ARM64 platforms (sun50i) Icenowy Zheng
2017-01-30 16:42   ` Vinod Koul
     [not found]     ` <3729521485800635@web23g.yandex.ru>
2017-01-31  3:32       ` Vinod Koul
2017-02-05  7:19   ` Vinod Koul
2017-01-29  2:33 ` [PATCH v3 09/10] ASoC: sunxi: allow the analog codec driver to be built on ARM64 Icenowy Zheng
2017-01-29  2:33 ` [PATCH v3 10/10] arm64: dts: sunxi: add support for the Orange Pi PC 2 board Icenowy Zheng

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