From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Chen-Yu Tsai <wens@csie.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
linux-clk@vger.kernel.org, linux-sunxi@googlegroups.com
Subject: Re: [PATCH 3/3] clk: sunxi-ng: a80: Fix audio PLL comment not matching actual code
Date: Sun, 26 Mar 2017 15:11:57 +0200 [thread overview]
Message-ID: <20170326131157.4kngtrhqpme433ac@lukather> (raw)
In-Reply-To: <20170324083307.18338-4-wens@csie.org>
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On Fri, Mar 24, 2017 at 04:33:07PM +0800, Chen-Yu Tsai wrote:
> We ignore the d1 and d2 dividers in the audio PLL, and force them to
> 1 (register value 0) at probe time. However the comment preceding the
> audio PLL definition says we enforce the default value, which is not
> the same.
>
> Fix the preceding comment to match what we do in code.
>
> Fixes: b8eb71dcdd08 ("clk: sunxi-ng: Add A80 CCU")
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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prev parent reply other threads:[~2017-03-26 13:11 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-24 8:33 [PATCH 0/3] clk: sunxi-ng: minimum multiplier and comment fixes Chen-Yu Tsai
2017-03-24 8:33 ` [PATCH 1/3] clk: sunxi-ng: use 1 as fallback for minimum multiplier Chen-Yu Tsai
2017-03-26 13:11 ` Maxime Ripard
2017-03-24 8:33 ` [PATCH 2/3] clk: sunxi-ng: Fix round_rate/set_rate multiplier minimum mismatch Chen-Yu Tsai
2017-03-26 13:11 ` Maxime Ripard
2017-03-24 8:33 ` [PATCH 3/3] clk: sunxi-ng: a80: Fix audio PLL comment not matching actual code Chen-Yu Tsai
2017-03-26 13:11 ` Maxime Ripard [this message]
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