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Date: Mon, 24 Apr 2017 10:51:09 +0200
From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Icenowy Zheng <icenowy@aosc.io>
Cc: Rob Herring <robh+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
        Jernej Skrabec <jernej.skrabec@siol.net>,
        linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com
Subject: Re: [PATCH v5 02/11] clk: sunxi-ng: add support for DE2 CCU
Message-ID: <20170424085109.p44bmzbyjkuf7ckv@lukather>
References: <20170423103754.50012-1-icenowy@aosc.io>
 <20170423103754.50012-3-icenowy@aosc.io>
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Hi,

On Sun, Apr 23, 2017 at 06:37:45PM +0800, Icenowy Zheng wrote:
> +static const struct of_device_id sunxi_de2_clk_ids[] =3D {
> +	{
> +		.compatible =3D "allwinner,sun8i-a83t-de2-clk",
> +		.data =3D &sun8i_a83t_de2_clk_desc,
> +	},
> +	{
> +		.compatible =3D "allwinner,sun50i-h5-de2-clk",
> +		.data =3D &sun50i_a64_de2_clk_desc,
> +	},
> +	/*
> +	 * The Allwinner A64 SoC needs some bit to be poke in syscon to make
> +	 * DE2 really working.
> +	 * So there's currently no A64 compatible here.
> +	 * H5 shares the same reset line with A64, so here H5 is using the
> +	 * clock description of A64.
> +	 */
> +	{ }
> +};

So that A64 driver would require more than just what you defined in
the binding in order to operate?

Maxime

--=20
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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