* [PATCH] clk: imx7d: Fix the DDR PLL enable bit
@ 2017-06-06 15:45 Fabio Estevam
2017-06-06 16:29 ` Stefan Agner
2017-06-07 0:42 ` Stephen Boyd
0 siblings, 2 replies; 3+ messages in thread
From: Fabio Estevam @ 2017-06-06 15:45 UTC (permalink / raw)
To: sboyd
Cc: shawnguo, kernel, stefan, linux-clk, leonard.crestez, festevam,
Fabio Estevam
Commit ad14972422899b6 ("clk: imx7d: Fix the powerdown bit location
of PLL DDR") used the incorrect bit for the IMX_PLLV3_DDR_IMX7 case.
Fix it accordingly to avoid a kernel hang.
Reported-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
---
drivers/clk/imx/clk-pllv3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index 0039b16..9af62ee 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -453,7 +453,7 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
ops = &clk_pllv3_enet_ops;
break;
case IMX_PLLV3_DDR_IMX7:
- pll->power_bit = IMX7_ENET_PLL_POWER;
+ pll->power_bit = IMX7_DDR_PLL_POWER;
ops = &clk_pllv3_av_ops;
break;
default:
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] clk: imx7d: Fix the DDR PLL enable bit
2017-06-06 15:45 [PATCH] clk: imx7d: Fix the DDR PLL enable bit Fabio Estevam
@ 2017-06-06 16:29 ` Stefan Agner
2017-06-07 0:42 ` Stephen Boyd
1 sibling, 0 replies; 3+ messages in thread
From: Stefan Agner @ 2017-06-06 16:29 UTC (permalink / raw)
To: Fabio Estevam
Cc: sboyd, shawnguo, kernel, linux-clk, leonard.crestez, festevam
On 2017-06-06 08:45, Fabio Estevam wrote:
> Commit ad14972422899b6 ("clk: imx7d: Fix the powerdown bit location
> of PLL DDR") used the incorrect bit for the IMX_PLLV3_DDR_IMX7 case.
>
> Fix it accordingly to avoid a kernel hang.
Yeah that sneaked in with the rename of the define between v1 -> v2,
didn't saw that sorry.
FWIW,
Reviewed-by: Stefan Agner <stefan@agner.ch>
--
Stefan
>
> Reported-by: Leonard Crestez <leonard.crestez@nxp.com>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
> ---
> drivers/clk/imx/clk-pllv3.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
> index 0039b16..9af62ee 100644
> --- a/drivers/clk/imx/clk-pllv3.c
> +++ b/drivers/clk/imx/clk-pllv3.c
> @@ -453,7 +453,7 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type
> type, const char *name,
> ops = &clk_pllv3_enet_ops;
> break;
> case IMX_PLLV3_DDR_IMX7:
> - pll->power_bit = IMX7_ENET_PLL_POWER;
> + pll->power_bit = IMX7_DDR_PLL_POWER;
> ops = &clk_pllv3_av_ops;
> break;
> default:
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] clk: imx7d: Fix the DDR PLL enable bit
2017-06-06 15:45 [PATCH] clk: imx7d: Fix the DDR PLL enable bit Fabio Estevam
2017-06-06 16:29 ` Stefan Agner
@ 2017-06-07 0:42 ` Stephen Boyd
1 sibling, 0 replies; 3+ messages in thread
From: Stephen Boyd @ 2017-06-07 0:42 UTC (permalink / raw)
To: Fabio Estevam
Cc: shawnguo, kernel, stefan, linux-clk, leonard.crestez, festevam
On 06/06, Fabio Estevam wrote:
> Commit ad14972422899b6 ("clk: imx7d: Fix the powerdown bit location
> of PLL DDR") used the incorrect bit for the IMX_PLLV3_DDR_IMX7 case.
>
> Fix it accordingly to avoid a kernel hang.
>
> Reported-by: Leonard Crestez <leonard.crestez@nxp.com>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 3+ messages in thread
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2017-06-06 15:45 [PATCH] clk: imx7d: Fix the DDR PLL enable bit Fabio Estevam
2017-06-06 16:29 ` Stefan Agner
2017-06-07 0:42 ` Stephen Boyd
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