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Date: Thu, 2 Nov 2017 09:46:05 +0100
From: Thierry Reding <thierry.reding@gmail.com>
To: Stephen Boyd <sboyd@codeaurora.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	Jonathan Hunter <jonathanh@nvidia.com>, linux-clk@vger.kernel.org,
	linux-tegra@vger.kernel.org
Subject: Re: [PATCH 1/4] dt-bindings: clock: tegra: Add sor1_out clock
Message-ID: <20171102084605.GA29341@ulmo>
References: <20170901145343.19890-1-thierry.reding@gmail.com>
 <20171102081648.GJ11011@codeaurora.org>
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On Thu, Nov 02, 2017 at 01:16:48AM -0700, Stephen Boyd wrote:
> On 09/01, Thierry Reding wrote:
> > From: Thierry Reding <treding@nvidia.com>
> >=20
> > The sor1_src clock implemented on Tegra210 is modelled the wrong way
> > around, which causes some issues with HDMI and DP support. This clock
> > implementation is provided by BPMP on Tegra186, which models this in
> > a more correct way. Since this introduces incompatibilities between
> > the two SoC generations which we want to avoid, the Tegra210 will be
> > fixed in subsequent patches.
> >=20
> > This change adds sor1_out as an alias for sor1_src.
> >=20
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
>=20
> Applied to clk-next

Hi Stephen,

sorry for not having been clear about this. This patch and the  2-4 are
part of the pull request I sent out earlier (and for which I have an
updated one to fix the regression I mentioned last week). I'd prefer to
send this to you via pull request because there is a dependency on this
=66rom the ARM SoC tree (for a DT change).

Any chance you could back this out?

Thierry

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