From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Date: Fri, 10 Nov 2017 18:44:51 -0800 From: Stephen Boyd To: Guodong Xu Cc: mturquette@baylibre.com, chenjun14@huawei.com, zhongkaihua@huawei.com, zhangfei.gao@linaro.org, leo.yan@linaro.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH] clk: hi3660: fix incorrect uart3 clock freqency Message-ID: <20171111024451.GD22441@codeaurora.org> References: <20170807145156.7880-1-guodong.xu@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <20170807145156.7880-1-guodong.xu@linaro.org> List-ID: On 08/07, Guodong Xu wrote: > From: Zhong Kaihua > > UART3 clock rate is doubled in previous commit. > > This error is not detected until recently a mezzanine board which makes > real use of uart3 port (through LS connector of 96boards) was setup > and tested on hi3660-hikey960 board. > > This patch changes clock source rate of clk_factor_uart3 to 100000000. > > Signed-off-by: Zhong Kaihua > Signed-off-by: Guodong Xu > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project