From: Shawn Guo <shawn.guo@linaro.org>
To: Jiancheng Xue <xuejiancheng@hisilicon.com>
Cc: sboyd@codeaurora.org, mturquette@baylibre.com,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
hermit.wangheming@hisilicon.com, project-aspen-dev@linaro.org
Subject: Re: [PATCH 0/3] add more clock definitions for hi3798cv200-poplar board
Date: Thu, 16 Nov 2017 08:54:41 +0800 [thread overview]
Message-ID: <20171116005438.GH11163@dragon> (raw)
In-Reply-To: <1508324429-6012-1-git-send-email-xuejiancheng@hisilicon.com>
Hi Stephen,
On Wed, Oct 18, 2017 at 07:00:26AM -0400, Jiancheng Xue wrote:
> Add more clock definitions for hi3798cv200-poplar board.
>
> Younian Wang (1):
> clk: hisilicon: correct ir clock rate for hi3798cv200 SoC
>
> tianshuliang (2):
> clk: hisilicon: add hisi phase clock support
> clk: hisilicon: add emmc sample and drive clock for hi3798cv200 SoC
Since you haven't applied this series, I will update it with a few more
patches added. I assume it's late for 4.15 merge window anyway, so I
intend to maintain a branch for all those Hi3798CV200 clock patches.
After the patches are properly reviewed, I can rebase the branch to
4.15-rc and then ask you to pull for next merge window. Sounds good to
you?
Shawn
next prev parent reply other threads:[~2017-11-16 0:54 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-18 11:00 [PATCH 0/3] add more clock definitions for hi3798cv200-poplar board Jiancheng Xue
2017-10-18 11:00 ` [PATCH 1/3] clk: hisilicon: add hisi phase clock support Jiancheng Xue
2017-11-16 2:31 ` Shawn Guo
2017-11-16 3:40 ` [project-aspen-dev] " Jiancheng Xue
2017-11-16 6:47 ` Shawn Guo
2017-10-18 11:00 ` [PATCH 2/3] clk: hisilicon: add emmc sample and drive clock for hi3798cv200 SoC Jiancheng Xue
2017-11-16 2:35 ` Shawn Guo
2017-10-18 11:00 ` [PATCH 3/3] clk: hisilicon: correct ir clock rate " Jiancheng Xue
2017-11-16 0:54 ` Shawn Guo [this message]
2017-11-16 22:17 ` [PATCH 0/3] add more clock definitions for hi3798cv200-poplar board Stephen Boyd
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