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Date: Fri, 8 Dec 2017 16:18:16 -0800
From: Stephen Boyd <sboyd@codeaurora.org>
To: Abhishek Sahu <absahu@codeaurora.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Andy Gross <andy.gross@linaro.org>,
	David Brown <david.brown@linaro.org>,
	Rajendra Nayak <rnayak@codeaurora.org>,
	linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 12/13] clk: qcom: support for 2 bit PLL post divider
Message-ID: <20171209001816.GC7997@codeaurora.org>
References: <1506621050-10129-1-git-send-email-absahu@codeaurora.org>
 <1506621050-10129-13-git-send-email-absahu@codeaurora.org>
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In-Reply-To: <1506621050-10129-13-git-send-email-absahu@codeaurora.org>
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On 09/28, Abhishek Sahu wrote:
> Current PLL driver only supports 4 bit PLL post divider so
> modified the PLL divider operations to support 2 bit PLL
> post divider.
> 
> Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
> ---

Applied to clk-next

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