From mboxrd@z Thu Jan  1 00:00:00 1970
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Date: Thu, 21 Dec 2017 15:57:39 -0800
From: Stephen Boyd <sboyd@codeaurora.org>
To: Andy.tang@nxp.com
Cc: mturquette@baylibre.com, robh+dt@kernel.org, mark.rutland@arm.com,
	linux-clk@vger.kernel.org, evicetree@vger.kernel.org
Subject: Re: [PATCH v2] clk: qoriq: add more divider clocks support
Message-ID: <20171221235739.GH7997@codeaurora.org>
References: <20171122014053.13597-1-Andy.tang@nxp.com>
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In-Reply-To: <20171122014053.13597-1-Andy.tang@nxp.com>
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On 11/22, Andy.tang@nxp.com wrote:
> From: Yuantian Tang <andy.tang@nxp.com>
> 
> More divider clocks are needed by IP. So enlarge the PLL divider
> array to accommodate more divider clocks.
> 
> Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
> Acked-by: Rob Herring <robh@kernel.org>
> ---

Applied to clk-next

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