From: Stephen Boyd <sboyd@codeaurora.org>
To: Lars-Peter Clausen <lars@metafoo.de>
Cc: Michael Turquette <mturquette@baylibre.com>, linux-clk@vger.kernel.org
Subject: Re: [PATCH 1/2] clk: axi-clkgen: Correctly handle nocount bit in recalc_rate()
Date: Thu, 21 Dec 2017 18:08:28 -0800 [thread overview]
Message-ID: <20171222020828.GH7997@codeaurora.org> (raw)
In-Reply-To: <20170905093241.18582-1-lars@metafoo.de>
On 09/05, Lars-Peter Clausen wrote:
> If the nocount bit is set the divider is bypassed and the settings for the
> divider count should be ignored and a divider value of 1 should be assumed.
> Handle this correctly in the driver recalc_rate() callback.
>
> While the driver sets up the part so that the read back dividers values
> yield the correct result the power-on reset settings of the part might not
> reflect this and hence calling e.g. clk_get_rate() without prior calls to
> clk_set_rate() will yield the wrong result.
>
> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
prev parent reply other threads:[~2017-12-22 2:08 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-05 9:32 [PATCH 1/2] clk: axi-clkgen: Correctly handle nocount bit in recalc_rate() Lars-Peter Clausen
2017-09-05 9:32 ` [PATCH 2/2] clk: axi-clkgen: Round closest in round_rate() and recalc_rate() Lars-Peter Clausen
2017-12-22 2:08 ` Stephen Boyd
2017-12-22 2:08 ` Stephen Boyd [this message]
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