From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: Date: Tue, 22 May 2018 17:51:40 -0500 From: Rob Herring To: Enric Balletbo i Serra Cc: MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Will Deacon , Heiko Stuebner , Michael Turquette , Stephen Boyd , Sandy Huang , David Airlie , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Derek Basehore , linux-clk@vger.kernel.org, linux-rockchip@lists.infradead.org, dri-devel@lists.freedesktop.org, Lin Huang , kernel@collabora.com, Sean Paul , linux-arm-kernel@lists.infradead.org, Nickey Yang , devicetree@vger.kernel.org, Yakir Yang , Mark Yao , Jacob Chen , Kever Yang , Brian Norris , Shawn Lin , Douglas Anderson , Catalin Marinas , Caesar Wang , Mark Rutland Subject: Re: [RFC PATCH 09/10] arm64: dts: rk3399: Add dfi and dmc nodes. Message-ID: <20180522225140.GA30149@rob-hp-laptop> References: <20180514211610.26618-1-enric.balletbo@collabora.com> <20180514211610.26618-10-enric.balletbo@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <20180514211610.26618-10-enric.balletbo@collabora.com> List-ID: On Mon, May 14, 2018 at 11:16:09PM +0200, Enric Balletbo i Serra wrote: > From: Lin Huang > > These are required to support DDR DVFS on rk3399 platform. The patch also > introduces two new files (rk3399-dram.h and rk3399-dram-default-timing) > with default DRAM settings. > > Signed-off-by: Lin Huang > Signed-off-by: Enric Balletbo i Serra > --- > > .../rockchip/rk3399-dram-default-timing.dtsi | 38 ++++++++++ > arch/arm64/boot/dts/rockchip/rk3399-dram.h | 73 +++++++++++++++++++ > .../boot/dts/rockchip/rk3399-op1-opp.dtsi | 29 ++++++++ > arch/arm64/boot/dts/rockchip/rk3399.dtsi | 20 +++++ > 4 files changed, 160 insertions(+) > create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-dram-default-timing.dtsi > create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-dram.h > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-dram-default-timing.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-dram-default-timing.dtsi > new file mode 100644 > index 000000000000..4dfe3e1d8bdf > --- /dev/null > +++ b/arch/arm64/boot/dts/rockchip/rk3399-dram-default-timing.dtsi > @@ -0,0 +1,38 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR X11) > +/* > + * Copyright (c) 2016-2018, Fuzhou Rockchip Electronics Co., Ltd > + * > + * Author: Lin Huang > + */ > + > +#include "rk3399-dram.h" > + > +rockchip,ddr3_speed_bin = <21>; > +rockchip,pd_idle = <0x40>; > +rockchip,sr_idle = <0x2>; Don't do includes this way please. These should go under a node. > +rockchip,sr_mc_gate_idle = <0x3>; > +rockchip,srpd_lite_idle = <0x4>; > +rockchip,standby_idle = <0x2000>; > +rockchip,dram_dll_dis_freq = <300000000>; > +rockchip,phy_dll_dis_freq = <125000000>; > +rockchip,auto_pd_dis_freq = <666000000>; > +rockchip,ddr3_odt_dis_freq = <333000000>; > +rockchip,ddr3_drv = ; > +rockchip,ddr3_odt = ; > +rockchip,phy_ddr3_ca_drv = ; > +rockchip,phy_ddr3_dq_drv = ; > +rockchip,phy_ddr3_odt = ; > +rockchip,lpddr3_odt_dis_freq = <333000000>; > +rockchip,lpddr3_drv = ; > +rockchip,lpddr3_odt = ; > +rockchip,phy_lpddr3_ca_drv = ; > +rockchip,phy_lpddr3_dq_drv = ; > +rockchip,phy_lpddr3_odt = ; > +rockchip,lpddr4_odt_dis_freq = <333000000>; > +rockchip,lpddr4_drv = ; > +rockchip,lpddr4_dq_odt = ; > +rockchip,lpddr4_ca_odt = ; > +rockchip,phy_lpddr4_ca_drv = ; > +rockchip,phy_lpddr4_ck_cs_drv = ; > +rockchip,phy_lpddr4_dq_drv = ; > +rockchip,phy_lpddr4_odt = ;